soc/intel/quark: MTRR support
Add the SoC specific routines to access the MTRR registers. These
registers exist in the host bridge and are not accessible via the
rdmsr/wrmsr instructions.
Testing on Galileo:
* Edit the src/mainboard/intel/galileo/Makefile.inc file
* Add "select ADD_FSP_PDAT_FILE"
* Add "select ADD_FSP_RAW_BIN"
* Add "select ADD_RMU_FILE"
* Add "select DISPLAY_MTRRS"
* Place the FSP.bin file in the location specified by CONFIG_FSP_FILE
* Place the pdat.bin files in the location specified by
CONFIG_FSP_PDAT_FILE
* Place the rmu.bin file in the location specified by CONFIG_RMU_FILE
* Testing is successful if:
* The message "FSP TempRamInit successful" is displayed
Change-Id: I7c124145429ae1d1365a6222a68853edbef4ff69
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/13530
Tested-by: build bot (Jenkins)
Reviewed-by: FEI WANG <wangfei.jimei@gmail.com>
diff --git a/src/soc/intel/quark/Kconfig b/src/soc/intel/quark/Kconfig
index d99cd54..08272f02 100644
--- a/src/soc/intel/quark/Kconfig
+++ b/src/soc/intel/quark/Kconfig
@@ -27,8 +27,10 @@
select ARCH_ROMSTAGE_X86_32
select ARCH_VERSTAGE_X86_32
select SOC_INTEL_COMMON
+ select SOC_SETS_MTRRS
select TSC_CONSTANT_RATE
select UDELAY_TSC
+ select UNCOMPRESSED_RAMSTAGE
select USE_MARCH_586
#####