src: Make PCI ID define names shorter
Shorten define names containing PCI_{DEVICE,VENDOR}_ID_ with
PCI_{DID,VID}_ using the commands below, which also take care of some
spacing issues. An additional clean up of pci_ids.h is done in
CB:61531.
Used commands:
* find -type f -exec sed -i 's/PCI_\([DV]\)\(EVICE\|ENDOR\)_ID_\([_0-9A-Za-z]\{2\}\([_0-9A-Za-z]\{8\}\)*[_0-9A-Za-z]\{0,5\}\)\t/PCI_\1ID_\3\t\t/g'
* find -type f -exec sed -i 's/PCI_\([DV]\)\(EVICE\|ENDOR\)_ID_\([_0-9A-Za-z]*\)/PCI_\1ID_\3/g'
Change-Id: If9027700f53b6d0d3964c26a41a1f9b8f62be178
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39331
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
diff --git a/src/soc/intel/skylake/bootblock/report_platform.c b/src/soc/intel/skylake/bootblock/report_platform.c
index 4af51d60..3cfac5e 100644
--- a/src/soc/intel/skylake/bootblock/report_platform.c
+++ b/src/soc/intel/skylake/bootblock/report_platform.c
@@ -34,62 +34,62 @@
u16 mchid;
const char *name;
} mch_table[] = {
- { PCI_DEVICE_ID_INTEL_SKL_ID_U, "Skylake-U" },
- { PCI_DEVICE_ID_INTEL_SKL_ID_Y, "Skylake-Y" },
- { PCI_DEVICE_ID_INTEL_SKL_ID_ULX, "Skylake-ULX" },
- { PCI_DEVICE_ID_INTEL_SKL_ID_H_4, "Skylake-H (4 Core)" },
- { PCI_DEVICE_ID_INTEL_SKL_ID_H_EM, "Skylake-H Embedded" },
- { PCI_DEVICE_ID_INTEL_SKL_ID_H_2, "Skylake-H (2 Core)" },
- { PCI_DEVICE_ID_INTEL_SKL_ID_S_2, "Skylake-S (2 Core)" },
- { PCI_DEVICE_ID_INTEL_SKL_ID_S_4, "Skylake-S (4 Core) / Skylake-DT" },
- { PCI_DEVICE_ID_INTEL_KBL_ID_U, "Kabylake-U" },
- { PCI_DEVICE_ID_INTEL_KBL_U_R, "Kabylake-R ULT"},
- { PCI_DEVICE_ID_INTEL_KBL_ID_Y, "Kabylake-Y" },
- { PCI_DEVICE_ID_INTEL_KBL_ID_H, "Kabylake-H" },
- { PCI_DEVICE_ID_INTEL_KBL_ID_S, "Kabylake-S" },
- { PCI_DEVICE_ID_INTEL_KBL_ID_DT, "Kabylake DT" },
- { PCI_DEVICE_ID_INTEL_KBL_ID_DT_2, "Kabylake DT 2" },
+ { PCI_DID_INTEL_SKL_ID_U, "Skylake-U" },
+ { PCI_DID_INTEL_SKL_ID_Y, "Skylake-Y" },
+ { PCI_DID_INTEL_SKL_ID_ULX, "Skylake-ULX" },
+ { PCI_DID_INTEL_SKL_ID_H_4, "Skylake-H (4 Core)" },
+ { PCI_DID_INTEL_SKL_ID_H_EM, "Skylake-H Embedded" },
+ { PCI_DID_INTEL_SKL_ID_H_2, "Skylake-H (2 Core)" },
+ { PCI_DID_INTEL_SKL_ID_S_2, "Skylake-S (2 Core)" },
+ { PCI_DID_INTEL_SKL_ID_S_4, "Skylake-S (4 Core) / Skylake-DT" },
+ { PCI_DID_INTEL_KBL_ID_U, "Kabylake-U" },
+ { PCI_DID_INTEL_KBL_U_R, "Kabylake-R ULT"},
+ { PCI_DID_INTEL_KBL_ID_Y, "Kabylake-Y" },
+ { PCI_DID_INTEL_KBL_ID_H, "Kabylake-H" },
+ { PCI_DID_INTEL_KBL_ID_S, "Kabylake-S" },
+ { PCI_DID_INTEL_KBL_ID_DT, "Kabylake DT" },
+ { PCI_DID_INTEL_KBL_ID_DT_2, "Kabylake DT 2" },
};
static struct {
u16 lpcid;
const char *name;
} pch_table[] = {
- { PCI_DEVICE_ID_INTEL_SPT_LP_SAMPLE, "Skylake LP Sample" },
- { PCI_DEVICE_ID_INTEL_SPT_LP_U_BASE, "Skylake-U Base" },
- { PCI_DEVICE_ID_INTEL_SPT_LP_U_PREMIUM, "Skylake-U Premium" },
- { PCI_DEVICE_ID_INTEL_SPT_LP_Y_PREMIUM, "Skylake-Y Premium" },
- { PCI_DEVICE_ID_INTEL_SPT_H_H110, "H110" },
- { PCI_DEVICE_ID_INTEL_SPT_H_H170, "H170" },
- { PCI_DEVICE_ID_INTEL_SPT_H_Z170, "Z170" },
- { PCI_DEVICE_ID_INTEL_SPT_H_Q170, "Q170" },
- { PCI_DEVICE_ID_INTEL_SPT_H_Q150, "Q150" },
- { PCI_DEVICE_ID_INTEL_SPT_H_B150, "B150" },
- { PCI_DEVICE_ID_INTEL_SPT_H_C236, "C236" },
- { PCI_DEVICE_ID_INTEL_SPT_H_C232, "C232" },
- { PCI_DEVICE_ID_INTEL_SPT_H_QM170, "QM170" },
- { PCI_DEVICE_ID_INTEL_SPT_H_HM170, "HM170" },
- { PCI_DEVICE_ID_INTEL_SPT_H_CM236, "CM236" },
- { PCI_DEVICE_ID_INTEL_SPT_H_HM175, "HM175" },
- { PCI_DEVICE_ID_INTEL_SPT_H_QM175, "QM175" },
- { PCI_DEVICE_ID_INTEL_SPT_H_CM238, "CM238" },
- { PCI_DEVICE_ID_INTEL_UPT_H_Q270, "Q270" },
- { PCI_DEVICE_ID_INTEL_UPT_H_H270, "H270" },
- { PCI_DEVICE_ID_INTEL_UPT_H_Z270, "Z270" },
- { PCI_DEVICE_ID_INTEL_UPT_H_B250, "B250" },
- { PCI_DEVICE_ID_INTEL_UPT_H_Q250, "Q250" },
- { PCI_DEVICE_ID_INTEL_UPT_H_Z370, "Z370" },
- { PCI_DEVICE_ID_INTEL_UPT_H_H310C, "H310C" },
- { PCI_DEVICE_ID_INTEL_UPT_H_B365, "B365" },
- { PCI_DEVICE_ID_INTEL_UPT_LP_U_BASE, "Kabylake-U Base" },
- { PCI_DEVICE_ID_INTEL_UPT_LP_U_PREMIUM, "Kabylake-U Premium" },
- { PCI_DEVICE_ID_INTEL_UPT_LP_Y_PREMIUM, "Kabylake-Y Premium" },
- { PCI_DEVICE_ID_INTEL_UPT_LP_SUPER_SKU, "Kabylake Super Sku" },
- { PCI_DEVICE_ID_INTEL_SPT_LP_Y_PREMIUM_HDCP22,
+ { PCI_DID_INTEL_SPT_LP_SAMPLE, "Skylake LP Sample" },
+ { PCI_DID_INTEL_SPT_LP_U_BASE, "Skylake-U Base" },
+ { PCI_DID_INTEL_SPT_LP_U_PREMIUM, "Skylake-U Premium" },
+ { PCI_DID_INTEL_SPT_LP_Y_PREMIUM, "Skylake-Y Premium" },
+ { PCI_DID_INTEL_SPT_H_H110, "H110" },
+ { PCI_DID_INTEL_SPT_H_H170, "H170" },
+ { PCI_DID_INTEL_SPT_H_Z170, "Z170" },
+ { PCI_DID_INTEL_SPT_H_Q170, "Q170" },
+ { PCI_DID_INTEL_SPT_H_Q150, "Q150" },
+ { PCI_DID_INTEL_SPT_H_B150, "B150" },
+ { PCI_DID_INTEL_SPT_H_C236, "C236" },
+ { PCI_DID_INTEL_SPT_H_C232, "C232" },
+ { PCI_DID_INTEL_SPT_H_QM170, "QM170" },
+ { PCI_DID_INTEL_SPT_H_HM170, "HM170" },
+ { PCI_DID_INTEL_SPT_H_CM236, "CM236" },
+ { PCI_DID_INTEL_SPT_H_HM175, "HM175" },
+ { PCI_DID_INTEL_SPT_H_QM175, "QM175" },
+ { PCI_DID_INTEL_SPT_H_CM238, "CM238" },
+ { PCI_DID_INTEL_UPT_H_Q270, "Q270" },
+ { PCI_DID_INTEL_UPT_H_H270, "H270" },
+ { PCI_DID_INTEL_UPT_H_Z270, "Z270" },
+ { PCI_DID_INTEL_UPT_H_B250, "B250" },
+ { PCI_DID_INTEL_UPT_H_Q250, "Q250" },
+ { PCI_DID_INTEL_UPT_H_Z370, "Z370" },
+ { PCI_DID_INTEL_UPT_H_H310C, "H310C" },
+ { PCI_DID_INTEL_UPT_H_B365, "B365" },
+ { PCI_DID_INTEL_UPT_LP_U_BASE, "Kabylake-U Base" },
+ { PCI_DID_INTEL_UPT_LP_U_PREMIUM, "Kabylake-U Premium" },
+ { PCI_DID_INTEL_UPT_LP_Y_PREMIUM, "Kabylake-Y Premium" },
+ { PCI_DID_INTEL_UPT_LP_SUPER_SKU, "Kabylake Super Sku" },
+ { PCI_DID_INTEL_SPT_LP_Y_PREMIUM_HDCP22,
"Kabylake-Y iHDCP 2.2 Premium" },
- { PCI_DEVICE_ID_INTEL_SPT_LP_U_PREMIUM_HDCP22,
+ { PCI_DID_INTEL_SPT_LP_U_PREMIUM_HDCP22,
"Kabylake-U iHDCP 2.2 Premium" },
- { PCI_DEVICE_ID_INTEL_SPT_LP_U_BASE_HDCP22,
+ { PCI_DID_INTEL_SPT_LP_U_BASE_HDCP22,
"Kabylake-U iHDCP 2.2 Base" },
};
@@ -97,37 +97,37 @@
u16 igdid;
const char *name;
} igd_table[] = {
- { PCI_DEVICE_ID_INTEL_SKL_GT1F_DT2, "Skylake DT GT1F" },
- { PCI_DEVICE_ID_INTEL_SKL_GT1_SULTM, "Skylake ULT GT1" },
- { PCI_DEVICE_ID_INTEL_SKL_GT1F_SHALM, "Skylake HALO GT1F" },
- { PCI_DEVICE_ID_INTEL_SKL_GT2_DT2P1, "Skylake DT GT2" },
- { PCI_DEVICE_ID_INTEL_SKL_GT2_SULTM, "Skylake ULT GT2" },
- { PCI_DEVICE_ID_INTEL_SKL_GT2_SHALM, "Skylake HALO GT2" },
- { PCI_DEVICE_ID_INTEL_SKL_GT2_SWKSM, "Skylake Mobile Xeon GT2"},
- { PCI_DEVICE_ID_INTEL_SKL_GT2_SULXM, "Skylake ULX GT2" },
- { PCI_DEVICE_ID_INTEL_SKL_GT3_SULTM, "Skylake ULT GT3" },
- { PCI_DEVICE_ID_INTEL_SKL_GT3E_SULTM_1, "Skylake ULT (15W) GT3E" },
- { PCI_DEVICE_ID_INTEL_SKL_GT3E_SULTM_2, "Skylake ULT (28W) GT3E" },
- { PCI_DEVICE_ID_INTEL_SKL_GT3FE_SSRVM, "Skylake Media Server GT3FE" },
- { PCI_DEVICE_ID_INTEL_SKL_GT4_SHALM, "Skylake HALO GT4" },
- { PCI_DEVICE_ID_INTEL_SKL_GT4E_SWSTM, "Skylake Workstation GT4E" },
- { PCI_DEVICE_ID_INTEL_KBL_GT1F_DT2, "Kaby Lake DT GT1F" },
- { PCI_DEVICE_ID_INTEL_KBL_GT1_SULTM, "Kaby Lake ULT GT1" },
- { PCI_DEVICE_ID_INTEL_KBL_GT1_SHALM_1, "Kaby Lake HALO GT1" },
- { PCI_DEVICE_ID_INTEL_KBL_GT1_SHALM_2, "Kaby Lake HALO GT1" },
- { PCI_DEVICE_ID_INTEL_KBL_GT1_SSRVM, "Kaby Lake SRV GT1" },
- { PCI_DEVICE_ID_INTEL_KBL_GT2_SSRVM, "Kaby Lake Media Server GT2" },
- { PCI_DEVICE_ID_INTEL_KBL_GT2_SWSTM, "Kaby Lake Workstation GT2" },
- { PCI_DEVICE_ID_INTEL_KBL_GT2_SULXM, "Kaby Lake ULX GT2" },
- { PCI_DEVICE_ID_INTEL_KBL_GT2_SULTM, "Kaby Lake ULT GT2" },
- { PCI_DEVICE_ID_INTEL_KBL_GT2_SULTMR, "Kaby Lake-R ULT GT2" },
- { PCI_DEVICE_ID_INTEL_KBL_GT2_SHALM, "Kaby Lake HALO GT2" },
- { PCI_DEVICE_ID_INTEL_KBL_GT2_DT2P2, "Kaby Lake DT GT2" },
- { PCI_DEVICE_ID_INTEL_KBL_GT2F_SULTM, "Kaby Lake ULT GT2F" },
- { PCI_DEVICE_ID_INTEL_KBL_GT3E_SULTM_1, "Kaby Lake ULT (15W) GT3E" },
- { PCI_DEVICE_ID_INTEL_KBL_GT3E_SULTM_2, "Kaby Lake ULT (28W) GT3E" },
- { PCI_DEVICE_ID_INTEL_KBL_GT4_SHALM, "Kaby Lake HALO GT4" },
- { PCI_DEVICE_ID_INTEL_AML_GT2_ULX, "Amberlake ULX GT2" },
+ { PCI_DID_INTEL_SKL_GT1F_DT2, "Skylake DT GT1F" },
+ { PCI_DID_INTEL_SKL_GT1_SULTM, "Skylake ULT GT1" },
+ { PCI_DID_INTEL_SKL_GT1F_SHALM, "Skylake HALO GT1F" },
+ { PCI_DID_INTEL_SKL_GT2_DT2P1, "Skylake DT GT2" },
+ { PCI_DID_INTEL_SKL_GT2_SULTM, "Skylake ULT GT2" },
+ { PCI_DID_INTEL_SKL_GT2_SHALM, "Skylake HALO GT2" },
+ { PCI_DID_INTEL_SKL_GT2_SWKSM, "Skylake Mobile Xeon GT2"},
+ { PCI_DID_INTEL_SKL_GT2_SULXM, "Skylake ULX GT2" },
+ { PCI_DID_INTEL_SKL_GT3_SULTM, "Skylake ULT GT3" },
+ { PCI_DID_INTEL_SKL_GT3E_SULTM_1, "Skylake ULT (15W) GT3E" },
+ { PCI_DID_INTEL_SKL_GT3E_SULTM_2, "Skylake ULT (28W) GT3E" },
+ { PCI_DID_INTEL_SKL_GT3FE_SSRVM, "Skylake Media Server GT3FE" },
+ { PCI_DID_INTEL_SKL_GT4_SHALM, "Skylake HALO GT4" },
+ { PCI_DID_INTEL_SKL_GT4E_SWSTM, "Skylake Workstation GT4E" },
+ { PCI_DID_INTEL_KBL_GT1F_DT2, "Kaby Lake DT GT1F" },
+ { PCI_DID_INTEL_KBL_GT1_SULTM, "Kaby Lake ULT GT1" },
+ { PCI_DID_INTEL_KBL_GT1_SHALM_1, "Kaby Lake HALO GT1" },
+ { PCI_DID_INTEL_KBL_GT1_SHALM_2, "Kaby Lake HALO GT1" },
+ { PCI_DID_INTEL_KBL_GT1_SSRVM, "Kaby Lake SRV GT1" },
+ { PCI_DID_INTEL_KBL_GT2_SSRVM, "Kaby Lake Media Server GT2" },
+ { PCI_DID_INTEL_KBL_GT2_SWSTM, "Kaby Lake Workstation GT2" },
+ { PCI_DID_INTEL_KBL_GT2_SULXM, "Kaby Lake ULX GT2" },
+ { PCI_DID_INTEL_KBL_GT2_SULTM, "Kaby Lake ULT GT2" },
+ { PCI_DID_INTEL_KBL_GT2_SULTMR, "Kaby Lake-R ULT GT2" },
+ { PCI_DID_INTEL_KBL_GT2_SHALM, "Kaby Lake HALO GT2" },
+ { PCI_DID_INTEL_KBL_GT2_DT2P2, "Kaby Lake DT GT2" },
+ { PCI_DID_INTEL_KBL_GT2F_SULTM, "Kaby Lake ULT GT2F" },
+ { PCI_DID_INTEL_KBL_GT3E_SULTM_1, "Kaby Lake ULT (15W) GT3E" },
+ { PCI_DID_INTEL_KBL_GT3E_SULTM_2, "Kaby Lake ULT (28W) GT3E" },
+ { PCI_DID_INTEL_KBL_GT4_SHALM, "Kaby Lake HALO GT4" },
+ { PCI_DID_INTEL_AML_GT2_ULX, "Amberlake ULX GT2" },
};
static uint8_t get_dev_revision(pci_devfn_t dev)
diff --git a/src/soc/intel/skylake/graphics.c b/src/soc/intel/skylake/graphics.c
index 98b469c..cb669b1 100644
--- a/src/soc/intel/skylake/graphics.c
+++ b/src/soc/intel/skylake/graphics.c
@@ -87,8 +87,8 @@
u32 new_vendev = vendev;
switch (vendev) {
- case 0x80865916: /* PCI_DEVICE_ID_INTEL_KBL_GT2_SULTM */
- case 0x80865917: /* PCI_DEVICE_ID_INTEL_KBL_GT2_SULTMR */
+ case 0x80865916: /* PCI_DID_INTEL_KBL_GT2_SULTM */
+ case 0x80865917: /* PCI_DID_INTEL_KBL_GT2_SULTMR */
new_vendev = SA_IGD_OPROM_VENDEV;
break;
}
diff --git a/src/soc/intel/skylake/vr_config.c b/src/soc/intel/skylake/vr_config.c
index 89d85cf..a036a1b 100644
--- a/src/soc/intel/skylake/vr_config.c
+++ b/src/soc/intel/skylake/vr_config.c
@@ -121,8 +121,8 @@
*/
switch (mch_id) {
- case PCI_DEVICE_ID_INTEL_SKL_ID_S_2: /* fallthrough */
- case PCI_DEVICE_ID_INTEL_KBL_ID_S: {
+ case PCI_DID_INTEL_SKL_ID_S_2: /* fallthrough */
+ case PCI_DID_INTEL_KBL_ID_S: {
uint16_t icc_max[NUM_VR_DOMAINS] = VR_CFG_ALL_DOMAINS_ICC(11.1, 40, 48, 48);
if (tdp >= 54)
icc_max[VR_IA_CORE] = VR_CFG_AMP(58);
@@ -131,9 +131,9 @@
return icc_max[domain];
}
- case PCI_DEVICE_ID_INTEL_SKL_ID_S_4: /* fallthrough */
- case PCI_DEVICE_ID_INTEL_KBL_ID_DT_2: /* fallthrough */
- case PCI_DEVICE_ID_INTEL_KBL_ID_DT: {
+ case PCI_DID_INTEL_SKL_ID_S_4: /* fallthrough */
+ case PCI_DID_INTEL_KBL_ID_DT_2: /* fallthrough */
+ case PCI_DID_INTEL_KBL_ID_DT: {
uint16_t icc_max[NUM_VR_DOMAINS] = VR_CFG_ALL_DOMAINS_ICC(11.1, 55, 45, 45);
if (tdp >= 91)
icc_max[VR_IA_CORE] = VR_CFG_AMP(100);
@@ -155,7 +155,7 @@
return icc_max[domain];
}
- case PCI_DEVICE_ID_INTEL_SKL_ID_H_4: {
+ case PCI_DID_INTEL_SKL_ID_H_4: {
uint16_t icc_max[NUM_VR_DOMAINS] = VR_CFG_ALL_DOMAINS_ICC(11.1, 60, 94, 20);
if (tdp >= 45) {
icc_max[VR_IA_CORE] = VR_CFG_AMP(74);
@@ -166,9 +166,9 @@
}
return icc_max[domain];
}
- case PCI_DEVICE_ID_INTEL_SKL_ID_H_2: /* fallthrough */
- case PCI_DEVICE_ID_INTEL_SKL_ID_H_EM: /* fallthrough */
- case PCI_DEVICE_ID_INTEL_KBL_ID_H: {
+ case PCI_DID_INTEL_SKL_ID_H_2: /* fallthrough */
+ case PCI_DID_INTEL_SKL_ID_H_EM: /* fallthrough */
+ case PCI_DID_INTEL_KBL_ID_H: {
uint16_t icc_max[NUM_VR_DOMAINS] = VR_CFG_ALL_DOMAINS_ICC(6.6, 60, 55, 55);
if (tdp >= 35) {
if (tdp >= 45)
@@ -179,11 +179,11 @@
return icc_max[domain];
}
- case PCI_DEVICE_ID_INTEL_SKL_ID_U: {
+ case PCI_DID_INTEL_SKL_ID_U: {
uint16_t icc_max[NUM_VR_DOMAINS] = VR_CFG_ALL_DOMAINS_ICC(5.1, 29, 57, 19);
if (tdp >= 28)
icc_max[VR_IA_CORE] = VR_CFG_AMP(32);
- else if (igd_id != PCI_DEVICE_ID_INTEL_SKL_GT3E_SULTM_1) {
+ else if (igd_id != PCI_DID_INTEL_SKL_GT3E_SULTM_1) {
const uint16_t icc_max_gt2[NUM_VR_DOMAINS] =
VR_CFG_ALL_DOMAINS_ICC(4.5, 29, 31, 31);
@@ -191,28 +191,28 @@
}
return icc_max[domain];
}
- case PCI_DEVICE_ID_INTEL_KBL_U_R: {
+ case PCI_DID_INTEL_KBL_U_R: {
const uint16_t icc_max[NUM_VR_DOMAINS] =
VR_CFG_ALL_DOMAINS_ICC(6, 64, 31, 31);
return icc_max[domain];
}
- case PCI_DEVICE_ID_INTEL_SKL_ID_Y: /* fallthrough */
- case PCI_DEVICE_ID_INTEL_KBL_ID_Y: {
+ case PCI_DID_INTEL_SKL_ID_Y: /* fallthrough */
+ case PCI_DID_INTEL_KBL_ID_Y: {
uint16_t icc_max[NUM_VR_DOMAINS] = VR_CFG_ALL_DOMAINS_ICC(4.1, 24, 24, 24);
- if (igd_id == PCI_DEVICE_ID_INTEL_AML_GT2_ULX)
+ if (igd_id == PCI_DID_INTEL_AML_GT2_ULX)
icc_max[VR_IA_CORE] = VR_CFG_AMP(28);
return icc_max[domain];
}
- case PCI_DEVICE_ID_INTEL_KBL_ID_U: {
+ case PCI_DID_INTEL_KBL_ID_U: {
uint16_t icc_max[NUM_VR_DOMAINS] = VR_CFG_ALL_DOMAINS_ICC(4.5, 32, 31, 31);
- if (igd_id == PCI_DEVICE_ID_INTEL_KBL_GT1_SULTM)
+ if (igd_id == PCI_DID_INTEL_KBL_GT1_SULTM)
icc_max[VR_IA_CORE] = VR_CFG_AMP(29);
- else if ((igd_id == PCI_DEVICE_ID_INTEL_KBL_GT3E_SULTM_1) ||
- (igd_id == PCI_DEVICE_ID_INTEL_KBL_GT3E_SULTM_2)) {
+ else if ((igd_id == PCI_DID_INTEL_KBL_GT3E_SULTM_1) ||
+ (igd_id == PCI_DID_INTEL_KBL_GT3E_SULTM_2)) {
const uint16_t icc_max_gt3[NUM_VR_DOMAINS] =
VR_CFG_ALL_DOMAINS_ICC(5.1, 32, 57, 19);
@@ -240,24 +240,24 @@
}
switch (mch_id) {
- case PCI_DEVICE_ID_INTEL_SKL_ID_S_2: /* fallthrough */
- case PCI_DEVICE_ID_INTEL_SKL_ID_S_4: /* fallthrough */
- case PCI_DEVICE_ID_INTEL_KBL_ID_S: /* fallthrough */
- case PCI_DEVICE_ID_INTEL_KBL_ID_DT: /* fallthrough */
- case PCI_DEVICE_ID_INTEL_KBL_ID_DT_2: {
+ case PCI_DID_INTEL_SKL_ID_S_2: /* fallthrough */
+ case PCI_DID_INTEL_SKL_ID_S_4: /* fallthrough */
+ case PCI_DID_INTEL_KBL_ID_S: /* fallthrough */
+ case PCI_DID_INTEL_KBL_ID_DT: /* fallthrough */
+ case PCI_DID_INTEL_KBL_ID_DT_2: {
/* SA Loadline is not specified */
const uint16_t loadline[NUM_VR_DOMAINS] =
VR_CFG_ALL_DOMAINS_LOADLINE(0, 2.1, 3.1, 3.1);
return loadline[domain];
}
- case PCI_DEVICE_ID_INTEL_SKL_ID_H_2: /* fallthrough */
- case PCI_DEVICE_ID_INTEL_SKL_ID_H_EM: /* fallthrough */
- case PCI_DEVICE_ID_INTEL_SKL_ID_H_4: /* fallthrough */
- case PCI_DEVICE_ID_INTEL_KBL_ID_H: {
+ case PCI_DID_INTEL_SKL_ID_H_2: /* fallthrough */
+ case PCI_DID_INTEL_SKL_ID_H_EM: /* fallthrough */
+ case PCI_DID_INTEL_SKL_ID_H_4: /* fallthrough */
+ case PCI_DID_INTEL_KBL_ID_H: {
const uint16_t loadline[NUM_VR_DOMAINS] =
VR_CFG_ALL_DOMAINS_LOADLINE(10, 1.8, 2.65, 2.65);
- if (igd_id == PCI_DEVICE_ID_INTEL_SKL_GT4_SHALM) {
+ if (igd_id == PCI_DID_INTEL_SKL_GT4_SHALM) {
const uint16_t loadline_gt4[NUM_VR_DOMAINS] =
VR_CFG_ALL_DOMAINS_LOADLINE(6, 1.6, 1.4, 6);
return loadline_gt4[domain];
@@ -265,26 +265,26 @@
return loadline[domain];
}
- case PCI_DEVICE_ID_INTEL_SKL_ID_Y: /* fallthrough */
- case PCI_DEVICE_ID_INTEL_KBL_ID_Y: {
+ case PCI_DID_INTEL_SKL_ID_Y: /* fallthrough */
+ case PCI_DID_INTEL_KBL_ID_Y: {
uint16_t loadline[NUM_VR_DOMAINS] =
VR_CFG_ALL_DOMAINS_LOADLINE(18, 5.9, 5.7, 5.7);
- if (igd_id == PCI_DEVICE_ID_INTEL_AML_GT2_ULX)
+ if (igd_id == PCI_DID_INTEL_AML_GT2_ULX)
loadline[VR_IA_CORE] = VR_CFG_MOHMS(4);
return loadline[domain];
}
- case PCI_DEVICE_ID_INTEL_SKL_ID_U: /* fallthrough */
- case PCI_DEVICE_ID_INTEL_KBL_U_R: /* fallthrough */
- case PCI_DEVICE_ID_INTEL_KBL_ID_U: {
+ case PCI_DID_INTEL_SKL_ID_U: /* fallthrough */
+ case PCI_DID_INTEL_KBL_U_R: /* fallthrough */
+ case PCI_DID_INTEL_KBL_ID_U: {
uint16_t loadline[NUM_VR_DOMAINS] =
VR_CFG_ALL_DOMAINS_LOADLINE(10.3, 2.4, 3.1, 3.1);
- if ((igd_id == PCI_DEVICE_ID_INTEL_SKL_GT3E_SULTM_1) ||
- (igd_id == PCI_DEVICE_ID_INTEL_SKL_GT3E_SULTM_2) ||
- (igd_id == PCI_DEVICE_ID_INTEL_KBL_GT3E_SULTM_1) ||
- (igd_id == PCI_DEVICE_ID_INTEL_KBL_GT3E_SULTM_2)) {
+ if ((igd_id == PCI_DID_INTEL_SKL_GT3E_SULTM_1) ||
+ (igd_id == PCI_DID_INTEL_SKL_GT3E_SULTM_2) ||
+ (igd_id == PCI_DID_INTEL_KBL_GT3E_SULTM_1) ||
+ (igd_id == PCI_DID_INTEL_KBL_GT3E_SULTM_2)) {
loadline[VR_GT_UNSLICED] = VR_CFG_MOHMS(2);
loadline[VR_GT_SLICED] = VR_CFG_MOHMS(6);
}