soc/intel/acpi: Replace Decrement(a) with ASL 2.0 syntax

Replace `Decrement (a)` with `a--`.

Change-Id: I5c9290aaa9fc969368d5934e4f48a75d915ca5ff
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70592
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
diff --git a/src/soc/intel/baytrail/acpi/dptf/charger.asl b/src/soc/intel/baytrail/acpi/dptf/charger.asl
index b8c6d14..4169b94 100644
--- a/src/soc/intel/baytrail/acpi/dptf/charger.asl
+++ b/src/soc/intel/baytrail/acpi/dptf/charger.asl
@@ -27,7 +27,7 @@
 	{
 		/* Convert size of PPSS table to index */
 		Store (SizeOf (\_SB.CHPS), Local0)
-		Decrement (Local0)
+		Local0--
 
 		/* Check if charging is disabled (AC removed) */
 		If (LEqual (\PWRS, Zero)) {
diff --git a/src/soc/intel/baytrail/acpi/dptf/cpu.asl b/src/soc/intel/baytrail/acpi/dptf/cpu.asl
index cd6a572..8e43f67 100644
--- a/src/soc/intel/baytrail/acpi/dptf/cpu.asl
+++ b/src/soc/intel/baytrail/acpi/dptf/cpu.asl
@@ -74,7 +74,7 @@
 	{
 		If (CondRefOf (\_SB.CP00._TSS)) {
 			Store (SizeOf (\_SB.CP00._TSS ()), Local0)
-			Decrement (Local0)
+			Local0--
 			Return (Local0)
 		} Else {
 			Return (0)
@@ -117,7 +117,7 @@
 			Return (\_SB.MPDL)
 		} ElseIf (CondRefOf (\_SB.CP00._PSS)) {
 			Store (SizeOf (\_SB.CP00._PSS ()), Local0)
-			Decrement (Local0)
+			Local0--
 			Return (Local0)
 		} Else {
 			Return (0)
diff --git a/src/soc/intel/baytrail/acpi/irqlinks.asl b/src/soc/intel/baytrail/acpi/irqlinks.asl
index ef3bdd4..a2f75fa 100644
--- a/src/soc/intel/baytrail/acpi/irqlinks.asl
+++ b/src/soc/intel/baytrail/acpi/irqlinks.asl
@@ -44,7 +44,7 @@
 		/* Which bit is set? */
 		FindSetRightBit(IRQ0, Local0)
 
-		Decrement(Local0)
+		Local0--
 		Store(Local0, PRTA)
 	}
 
@@ -103,7 +103,7 @@
 		/* Which bit is set? */
 		FindSetRightBit(IRQ0, Local0)
 
-		Decrement(Local0)
+		Local0--
 		Store(Local0, PRTB)
 	}
 
@@ -162,7 +162,7 @@
 		/* Which bit is set? */
 		FindSetRightBit(IRQ0, Local0)
 
-		Decrement(Local0)
+		Local0--
 		Store(Local0, PRTC)
 	}
 
@@ -221,7 +221,7 @@
 		/* Which bit is set? */
 		FindSetRightBit(IRQ0, Local0)
 
-		Decrement(Local0)
+		Local0--
 		Store(Local0, PRTD)
 	}
 
@@ -280,7 +280,7 @@
 		/* Which bit is set? */
 		FindSetRightBit(IRQ0, Local0)
 
-		Decrement(Local0)
+		Local0--
 		Store(Local0, PRTE)
 	}
 
@@ -339,7 +339,7 @@
 		/* Which bit is set? */
 		FindSetRightBit(IRQ0, Local0)
 
-		Decrement(Local0)
+		Local0--
 		Store(Local0, PRTF)
 	}
 
@@ -398,7 +398,7 @@
 		/* Which bit is set? */
 		FindSetRightBit(IRQ0, Local0)
 
-		Decrement(Local0)
+		Local0--
 		Store(Local0, PRTG)
 	}
 
@@ -457,7 +457,7 @@
 		/* Which bit is set? */
 		FindSetRightBit(IRQ0, Local0)
 
-		Decrement(Local0)
+		Local0--
 		Store(Local0, PRTH)
 	}
 
diff --git a/src/soc/intel/braswell/acpi/dptf/charger.asl b/src/soc/intel/braswell/acpi/dptf/charger.asl
index fca9590..6fe8bad 100644
--- a/src/soc/intel/braswell/acpi/dptf/charger.asl
+++ b/src/soc/intel/braswell/acpi/dptf/charger.asl
@@ -27,7 +27,7 @@
 	{
 		/* Convert size of PPSS table to index */
 		Store (SizeOf (\_SB.CHPS), Local0)
-		Decrement (Local0)
+		Local0--
 
 		/* Check if charging is disabled (AC removed) */
 		If (LEqual (\_SB.PCI0.LPCB.EC0.ACEX, Zero)) {
diff --git a/src/soc/intel/braswell/acpi/dptf/cpu.asl b/src/soc/intel/braswell/acpi/dptf/cpu.asl
index e219c99..d2ee0ae 100644
--- a/src/soc/intel/braswell/acpi/dptf/cpu.asl
+++ b/src/soc/intel/braswell/acpi/dptf/cpu.asl
@@ -101,7 +101,7 @@
 	{
 		If (CondRefOf (\_SB.CP00._TSS)) {
 			Store (SizeOf (\_SB.CP00._TSS ()), Local0)
-			Decrement (Local0)
+			Local0--
 			Return (Local0)
 		} Else {
 			Return (0)
@@ -144,7 +144,7 @@
 			Return (\_SB.MPDL)
 		} ElseIf (CondRefOf (\_SB.CP00._PSS)) {
 			Store (SizeOf (\_SB.CP00._PSS ()), Local0)
-			Decrement (Local0)
+			Local0--
 			Return (Local0)
 		} Else {
 			Return (0)
diff --git a/src/soc/intel/braswell/acpi/irqlinks.asl b/src/soc/intel/braswell/acpi/irqlinks.asl
index 6f88459..508a721 100644
--- a/src/soc/intel/braswell/acpi/irqlinks.asl
+++ b/src/soc/intel/braswell/acpi/irqlinks.asl
@@ -44,7 +44,7 @@
 		/* Which bit is set? */
 		FindSetRightBit(IRQ0, Local0)
 
-		Decrement(Local0)
+		Local0--
 		Store(Local0, PRTA)
 	}
 
@@ -103,7 +103,7 @@
 		/* Which bit is set? */
 		FindSetRightBit(IRQ0, Local0)
 
-		Decrement(Local0)
+		Local0--
 		Store(Local0, PRTB)
 	}
 
@@ -162,7 +162,7 @@
 		/* Which bit is set? */
 		FindSetRightBit(IRQ0, Local0)
 
-		Decrement(Local0)
+		Local0--
 		Store(Local0, PRTC)
 	}
 
@@ -221,7 +221,7 @@
 		/* Which bit is set? */
 		FindSetRightBit(IRQ0, Local0)
 
-		Decrement(Local0)
+		Local0--
 		Store(Local0, PRTD)
 	}
 
@@ -280,7 +280,7 @@
 		/* Which bit is set? */
 		FindSetRightBit(IRQ0, Local0)
 
-		Decrement(Local0)
+		Local0--
 		Store(Local0, PRTE)
 	}
 
@@ -339,7 +339,7 @@
 		/* Which bit is set? */
 		FindSetRightBit(IRQ0, Local0)
 
-		Decrement(Local0)
+		Local0--
 		Store(Local0, PRTF)
 	}
 
@@ -398,7 +398,7 @@
 		/* Which bit is set? */
 		FindSetRightBit(IRQ0, Local0)
 
-		Decrement(Local0)
+		Local0--
 		Store(Local0, PRTG)
 	}
 
@@ -457,7 +457,7 @@
 		/* Which bit is set? */
 		FindSetRightBit(IRQ0, Local0)
 
-		Decrement(Local0)
+		Local0--
 		Store(Local0, PRTH)
 	}