commit 43810d933209ddf7ca0622ff838e6f02f4d8f810
author Furquan Shaikh <furquan@chromium.org> Mon Oct 16 22:22:46 2017 -0700
committer Furquan Shaikh <furquan@google.com> Thu Oct 19 00:43:05 2017 +0000
tree 81ae6b8dfa4eb6b4b9ea40f821af1df30c26106f
parent ab6201835acb26c00f2975f9bad35c6024e3a0bf

soc/intel/apollolake: Use newly added pmc_read_pm1_control

BUG=b:67874513

Change-Id: I6d5a76122b7d6e508e5ff3f4099e5d706fb48f9d
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/22082
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

src/soc/intel/apollolake/pmutil.c

diff --git a/src/soc/intel/apollolake/pmutil.c b/src/soc/intel/apollolake/pmutil.c
index b9ed5b4..5fcefd7 100644
--- a/src/soc/intel/apollolake/pmutil.c
+++ b/src/soc/intel/apollolake/pmutil.c
@@ -86,7 +86,7 @@
  */
 uint32_t soc_get_smi_status(uint32_t generic_sts)
 {
-	if (generic_sts == 0 && !(inl(ACPI_BASE_ADDRESS + PM1_CNT) & SCI_EN)) {
+	if (generic_sts == 0 && !(pmc_read_pm1_control() & SCI_EN)) {
 		uint16_t pm1_sts = inw(ACPI_BASE_ADDRESS + PM1_STS);
 
 		/* Fake PM1 status bit if power button pressed. */