diff --git a/src/cpu/intel/haswell/romstage.c b/src/cpu/intel/haswell/romstage.c
index 0f0890a..6adb8be 100644
--- a/src/cpu/intel/haswell/romstage.c
+++ b/src/cpu/intel/haswell/romstage.c
@@ -35,7 +35,6 @@
 #include <cbfs.h>
 #include <romstage_handoff.h>
 #include <reset.h>
-#include <stage_cache.h>
 #include <vendorcode/google/chromeos/chromeos.h>
 #if CONFIG_EC_GOOGLE_CHROMEEC
 #include <ec/google/chromeec/ec.h>
@@ -256,17 +255,13 @@
 
 	if (!wake_from_s3) {
 		cbmem_initialize_empty();
-		stage_cache_create_empty();
 		/* Save data returned from MRC on non-S3 resumes. */
 		save_mrc_data(params->pei_data);
-	} else {
-		stage_cache_recover();
-		if (cbmem_initialize()) {
-		#if CONFIG_HAVE_ACPI_RESUME
-			/* Failed S3 resume, reset to come up cleanly */
-			reset_system();
-		#endif
-		}
+	} else if (cbmem_initialize()) {
+	#if CONFIG_HAVE_ACPI_RESUME
+		/* Failed S3 resume, reset to come up cleanly */
+		reset_system();
+	#endif
 	}
 
 	handoff = romstage_handoff_find_or_add();