tree f7307d8b38c5172bb7bd4bfc28ba374650e84e8e
parent c9a9f839cb299d26de70a6c0f1fbcb8be7aa4f0c
author Angel Pons <th3fanbus@gmail.com> 1609683997 +0100
committer Angel Pons <th3fanbus@gmail.com> 1609951833 +0000

nb/intel/sandybridge: Define and use `QCLK_PI` constant

To allow adjusting the phase shift of the various I/O signals, the
memory controller contains several PIs (Phase Interpolators). These
devices subdivide a QCLK (quarter of a clock cycle) in 64 `ticks`,
and the desired phase shift is specified in a register. For shifts
larger than one QCLK, there are `logic delay` registers, which allow
shifting a whole number of QCLKs in addition to the PI phase shift.

The number of PI ticks in a QCLK is often used in raminit calculations.
Define the `QCLK_PI` macro and use it in place of magic numbers. In
addition, add macros for other commonly-used values that use `QCLK_PI`
to avoid unnecessarily repeating `2 * QCLK_PI`, such as `CCC_MAX_PI`.

Tested with BUILD_TIMELESS=1, Asus P8Z77-V LX2 does not change.

Change-Id: Id6ba32eb1278ef71cecb7e63bd8a95d17430ae54
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49065
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>