AMD cimx/sb800: Move cimx init for ramstage
This has nothing to do with SATA controller. We only need to
fill the table with defaults before we parse devicetree for
changes to device configuration.
Change-Id: Ic4b28b5992ec9bfdf252f61b1c86b0162243cc95
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/8386
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Dave Frodin <dave.frodin@se-eng.com>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
diff --git a/src/southbridge/amd/cimx/sb800/late.c b/src/southbridge/amd/cimx/sb800/late.c
index 19d7fb5..9a08121 100644
--- a/src/southbridge/amd/cimx/sb800/late.c
+++ b/src/southbridge/amd/cimx/sb800/late.c
@@ -59,7 +59,7 @@
* @param[in] config Southbridge configuration structure pointer.
*
*/
-u32 sb800_callout_entry(u32 func, u32 data, void* config)
+static u32 sb800_callout_entry(u32 func, u32 data, void* config)
{
u32 ret = 0;
printk(BIOS_DEBUG, "SB800 - Late.c - %s - Start.\n", __func__);
@@ -260,6 +260,15 @@
};
/**
+ * Fill build time defaults.
+ */
+static void sb800_init(void *chip_info)
+{
+ sb_config->StdHeader.CALLBACK.CalloutPtr = sb800_callout_entry;
+ sb800_cimx_config(sb_config);
+}
+
+/**
* South Bridge CIMx ramstage entry point wrapper.
*/
void sb_Before_Pci_Init(void)
@@ -346,7 +355,6 @@
abcfg_reg(0xc0, 0x01FF, 0x010); /* x4 Port_0 */
break;
}
- sb800_cimx_config(sb_config);
if (dev->enabled) {
sb_config->SATAMODE.SataMode.SataController = CIMX_OPTION_ENABLED;
@@ -477,5 +485,6 @@
struct chip_operations southbridge_amd_cimx_sb800_ops = {
CHIP_NAME("ATI SB800")
+ .init = sb800_init,
.enable_dev = sb800_enable,
};