commit | 411023af720e37ae932981b1c8da91fc3867ddb3 | [log] [tgz] |
---|---|---|
author | Matt DeVillier <matt.devillier@gmail.com> | Tue Oct 18 14:31:50 2022 -0500 |
committer | Felix Held <felix-coreboot@felixheld.de> | Thu Oct 20 17:22:57 2022 +0000 |
tree | 819ef45e48f1a702dd35130c1381d116fa3c3550 | |
parent | 3d242755ef12815e358e6662495c371d2c2ba3bc [diff] |
drivers/tpm: Move TPM init to end of device init phase Boards which use an I2C TPM and do not use vboot will not have the I2C bus initialized/ready at the start of the device init phase. If TPM init is called before the bus, init will fail with I2C transfer timeouts and a significantly lengthened boot time. Resolves: https://ticket.coreboot.org/issues/429 TEST=build/boot google/reef w/o vboot, verify successful TPM init. Change-Id: Ic47e465db1c06d8b79a1f0a06906843149b6dacd Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/68550 Reviewed-by: Alexandru Stan <amstan@chromium.org> Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.
With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.
coreboot was formerly known as LinuxBIOS.
After the basic initialization of the hardware has been performed, any desired "payload" can be started by coreboot.
See https://www.coreboot.org/Payloads for a list of supported payloads.
coreboot supports a wide range of chipsets, devices, and mainboards.
For details please consult:
ANY_TOOLCHAIN
Kconfig option if you're feeling lucky (no support in this case).Optional:
make menuconfig
and make nconfig
)Please consult https://www.coreboot.org/Build_HOWTO for details.
If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.
Please see https://www.coreboot.org/QEMU for details.
Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:
You can contact us directly on the coreboot mailing list:
https://www.coreboot.org/Mailinglist
The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.
coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the "GPL (version 2, or any later version)", and some files are licensed under the "GPL, version 2". For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.
This makes the resulting coreboot images licensed under the GPL, version 2.