soc/intel/xeon_sp: Add ACPI names

Set the unused 'name' property of the domain device and store
the ACPI name. Every IIO stack can have multiple domain devices,
each owning a subset of the available bus range within the stack.

The name will be used in future changes to generate ACPI names
in SSDT code generation. It can also be used to identify the domain
type by looking at the first two characters of the name.

Change-Id: Ic4cc81d198fb88300394055682a3954bf22db570
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80792
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Shuo Liu <shuo.liu@intel.com>
diff --git a/src/soc/intel/xeon_sp/spr/ioat.c b/src/soc/intel/xeon_sp/spr/ioat.c
index 0d81d0d..5528efa 100644
--- a/src/soc/intel/xeon_sp/spr/ioat.c
+++ b/src/soc/intel/xeon_sp/spr/ioat.c
@@ -8,6 +8,8 @@
 
 #include <defs_iio.h>
 #include <hob_iiouds.h>
+#include <intelblocks/acpi.h>
+#include <soc/acpi.h>
 #include <IioPcieConfigUpd.h>
 
 #include <soc/chip_common.h>
@@ -21,12 +23,16 @@
 	.read_resources = noop_read_resources,
 	.set_resources = pci_domain_set_resources,
 	.scan_bus = pci_host_bridge_scan_bus,
+#if CONFIG(HAVE_ACPI_TABLES)
+	.acpi_name        = soc_acpi_name,
+#endif
 };
 
 static void create_ioat_domain(const union xeon_domain_path dp, struct bus *const upstream,
 				const unsigned int bus_base, const unsigned int bus_limit,
 				const resource_t mem32_base, const resource_t mem32_limit,
-				const resource_t mem64_base, const resource_t mem64_limit)
+				const resource_t mem64_base, const resource_t mem64_limit,
+				const char *prefix)
 {
 	union xeon_domain_path new_path = {
 		.domain_path = dp.domain_path
@@ -44,6 +50,7 @@
 		die("%s: out of memory.\n", __func__);
 
 	domain->ops = &ioat_domain_ops;
+	iio_domain_set_acpi_name(domain, prefix);
 
 	struct bus *const bus = alloc_bus(domain);
 	bus->secondary = bus_base;
@@ -94,14 +101,16 @@
 	mem64_limit = mem64_base + CPM_MMIO_SIZE - 1;
 	bus_base = sr->BusBase + CPM_BUS_OFFSET;
 	bus_limit = bus_base + CPM_RESERVED_BUS;
-	create_ioat_domain(path, bus, bus_base, bus_limit, 0, -1, mem64_base, mem64_limit);
+	create_ioat_domain(path, bus, bus_base, bus_limit, 0, -1, mem64_base, mem64_limit,
+			   DOMAIN_TYPE_CPM0);
 
 	/* HQM0 */
 	mem64_base = mem64_limit + 1;
 	mem64_limit = mem64_base + HQM_MMIO_SIZE - 1;
 	bus_base = sr->BusBase + HQM_BUS_OFFSET;
 	bus_limit = bus_base + HQM_RESERVED_BUS;
-	create_ioat_domain(path, bus, bus_base, bus_limit, 0, -1, mem64_base, mem64_limit);
+	create_ioat_domain(path, bus, bus_base, bus_limit, 0, -1, mem64_base, mem64_limit,
+			   DOMAIN_TYPE_HQM0);
 
 	/* CPM1 (optional) */
 	mem64_base = mem64_limit + 1;
@@ -109,7 +118,8 @@
 	bus_base = sr->BusBase + CPM1_BUS_OFFSET;
 	bus_limit = bus_base + CPM_RESERVED_BUS;
 	if (bus_limit <= sr->BusLimit)
-		create_ioat_domain(path, bus, bus_base, bus_limit, 0, -1, mem64_base, mem64_limit);
+		create_ioat_domain(path, bus, bus_base, bus_limit, 0, -1, mem64_base, mem64_limit,
+				   DOMAIN_TYPE_CPM1);
 
 	/* HQM1 (optional) */
 	mem64_base = mem64_limit + 1;
@@ -117,7 +127,8 @@
 	bus_base = sr->BusBase + HQM1_BUS_OFFSET;
 	bus_limit = bus_base + HQM_RESERVED_BUS;
 	if (bus_limit <= sr->BusLimit)
-		create_ioat_domain(path, bus, bus_base, bus_limit, 0, -1, mem64_base, mem64_limit);
+		create_ioat_domain(path, bus, bus_base, bus_limit, 0, -1, mem64_base, mem64_limit,
+				   DOMAIN_TYPE_HQM1);
 
 	/* DINO */
 	mem64_base = mem64_limit + 1;
@@ -125,5 +136,5 @@
 	bus_base = sr->BusBase;
 	bus_limit = bus_base;
 	create_ioat_domain(path, bus, bus_base, bus_limit, sr->PciResourceMem32Base, sr->PciResourceMem32Limit,
-		mem64_base, mem64_limit);
+			   mem64_base, mem64_limit, DOMAIN_TYPE_DINO);
 }