commonlib/console/post_code.h: Change post code prefix to POSTCODE
The prefix POSTCODE makes it clear that the macro is a post code.
Hence, replace related macros starting with POST to POSTCODE and
also replace every instance the macros are invoked with the new
name.
The files was changed by running the following bash script from the
top level directory.
sed -i'' '30,${s/#define POST/#define POSTCODE/g;}' \
src/commonlib/include/commonlib/console/post_codes.h;
myArray=`grep -e "^#define POSTCODE_" \
src/commonlib/include/commonlib/console/post_codes.h | \
grep -v "POST_CODES_H" | tr '\t' ' ' | cut -d ' ' -f 2`;
for str in ${myArray[@]}; do
splitstr=`echo $str | cut -d '_' -f2-`
grep -r POST_$splitstr src | \
cut -d ':' -f 1 | xargs sed -i'' -e "s/POST_$splitstr/$str/g";
grep -r "POST_$splitstr" util/cbfstool | \
cut -d ':' -f 1 | xargs sed -i'' -e "s/POST_$splitstr/$str/g";
done
Change-Id: I25db79fa15f032c08678f66d86c10c928b7de9b8
Signed-off-by: lilacious <yuchenhe126@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76043
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
diff --git a/src/cpu/intel/car/core2/cache_as_ram.S b/src/cpu/intel/car/core2/cache_as_ram.S
index b9104e6..316b703 100644
--- a/src/cpu/intel/car/core2/cache_as_ram.S
+++ b/src/cpu/intel/car/core2/cache_as_ram.S
@@ -16,7 +16,7 @@
bootblock_pre_c_entry:
cache_as_ram:
- post_code(POST_BOOTBLOCK_CAR)
+ post_code(POSTCODE_BOOTBLOCK_CAR)
/* Send INIT IPI to all excluding ourself. */
movl $0x000C4500, %eax
@@ -185,7 +185,7 @@
call bootblock_c_entry_bist
/* Should never see this postcode */
- post_code(POST_DEAD_CODE)
+ post_code(POSTCODE_DEAD_CODE)
.Lhlt:
hlt
diff --git a/src/cpu/intel/car/non-evict/cache_as_ram.S b/src/cpu/intel/car/non-evict/cache_as_ram.S
index d47fa72..187b1ca 100644
--- a/src/cpu/intel/car/non-evict/cache_as_ram.S
+++ b/src/cpu/intel/car/non-evict/cache_as_ram.S
@@ -21,7 +21,7 @@
jmp check_mtrr /* Check if CPU properly reset */
cache_as_ram:
- post_code(POST_BOOTBLOCK_CAR)
+ post_code(POSTCODE_BOOTBLOCK_CAR)
/* Send INIT IPI to all excluding ourself. */
movl $0x000C4500, %eax
@@ -238,7 +238,7 @@
call bootblock_c_entry_bist
/* Should never see this postcode */
- post_code(POST_DEAD_CODE)
+ post_code(POSTCODE_DEAD_CODE)
.Lhlt:
diff --git a/src/cpu/intel/car/p3/cache_as_ram.S b/src/cpu/intel/car/p3/cache_as_ram.S
index c19fa3c..1431d32 100644
--- a/src/cpu/intel/car/p3/cache_as_ram.S
+++ b/src/cpu/intel/car/p3/cache_as_ram.S
@@ -14,7 +14,7 @@
bootblock_pre_c_entry:
cache_as_ram:
- post_code(POST_BOOTBLOCK_CAR)
+ post_code(POSTCODE_BOOTBLOCK_CAR)
/* Clear/disable fixed MTRRs */
mov $fixed_mtrr_list_size, %ebx
@@ -160,7 +160,7 @@
call bootblock_c_entry_bist
/* Should never see this postcode */
- post_code(POST_DEAD_CODE)
+ post_code(POSTCODE_DEAD_CODE)
.Lhlt:
hlt
diff --git a/src/cpu/intel/car/p4-netburst/cache_as_ram.S b/src/cpu/intel/car/p4-netburst/cache_as_ram.S
index efd0d17..0362d10 100644
--- a/src/cpu/intel/car/p4-netburst/cache_as_ram.S
+++ b/src/cpu/intel/car/p4-netburst/cache_as_ram.S
@@ -20,7 +20,7 @@
bootblock_pre_c_entry:
cache_as_ram:
- post_code(POST_BOOTBLOCK_CAR)
+ post_code(POSTCODE_BOOTBLOCK_CAR)
movl $LAPIC_BASE_MSR, %ecx
rdmsr
@@ -385,7 +385,7 @@
call bootblock_c_entry_bist
/* Should never see this postcode */
- post_code(POST_DEAD_CODE)
+ post_code(POSTCODE_DEAD_CODE)
.Lhlt:
hlt