soc/amd/stoneyridge: Normalize GPIO init
This makes the flow for GPIO initialization more closely follow that
what is performed for other boards so that it's easier to read the flow
(and stops relying on BS_WRITE_TABLES).
BUG=b:72875858
TEST=Built and booted grunt, built gardenia.
Change-Id: Ic97db96581a69798b193a6bdeb93644f6a74fc9d
Signed-off-by: Justin TerAvest <teravest@chromium.org>
Reviewed-on: https://review.coreboot.org/23679
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/mainboard/google/kahlee/mainboard.c b/src/mainboard/google/kahlee/mainboard.c
index b7adfc0..aa8d080 100644
--- a/src/mainboard/google/kahlee/mainboard.c
+++ b/src/mainboard/google/kahlee/mainboard.c
@@ -156,11 +156,16 @@
const struct sci_source *gpes;
size_t num;
int boardid = board_id();
+ size_t num_gpios;
+ const struct soc_amd_stoneyridge_gpio *gpios;
printk(BIOS_INFO, "Board ID: %d\n", boardid);
mainboard_ec_init();
+ gpios = variant_gpio_table(&num_gpios);
+ sb_program_gpios(gpios, num_gpios);
+
gpes = get_gpe_table(&num);
gpe_configure_sci(gpes, num);