nb/amd/pi/00730F01/northbridge: assume that there's DRAM
This APU is always a single-node and since we're in ramstage when
domain_read_resources gets called, there's DRAM on this node, so no need
to check for this. To be extra sure, also initialize basek and limitk
before calling get_dram_base_limit with pointers to those as arguments.
This won't be necessary for the code to work as intended, but will
probably keep the compiler from complaining. Also move the declaration
of basek, limitk and sizek to the beginning of the function.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I4ef8011eb57b16218b8f5fea295900b855c3014b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79611
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/northbridge/amd/pi/00730F01/northbridge.c b/src/northbridge/amd/pi/00730F01/northbridge.c
index 9da8465..52cdbe5 100644
--- a/src/northbridge/amd/pi/00730F01/northbridge.c
+++ b/src/northbridge/amd/pi/00730F01/northbridge.c
@@ -590,6 +590,9 @@
#if CONFIG_HW_MEM_HOLE_SIZEK != 0
struct hw_mem_hole_info mem_hole;
#endif
+ resource_t basek = 0;
+ resource_t limitk = 0;
+ resource_t sizek;
pci_domain_read_resources(dev);
@@ -611,49 +614,46 @@
}
#endif
- resource_t basek, limitk, sizek;
- if (get_dram_base_limit(&basek, &limitk)) {
+ get_dram_base_limit(&basek, &limitk);
+ sizek = limitk - basek;
+
+ printk(BIOS_DEBUG, "basek=%08llx, limitk=%08llx, sizek=%08llx,\n",
+ basek, limitk, sizek);
+
+ /* See if we need a hole from 0xa0000 (640K) to 0xfffff (1024K) */
+ if (basek < 640 && sizek > 1024) {
+ ram_resource_kb(dev, idx++, basek, 640 - basek);
+ basek = 1024;
sizek = limitk - basek;
-
- printk(BIOS_DEBUG, "basek=%08llx, limitk=%08llx, sizek=%08llx,\n",
- basek, limitk, sizek);
-
- /* See if we need a hole from 0xa0000 (640K) to 0xfffff (1024K) */
- if (basek < 640 && sizek > 1024) {
- ram_resource_kb(dev, idx++, basek, 640 - basek);
- basek = 1024;
- sizek = limitk - basek;
- }
-
- printk(BIOS_DEBUG, "basek=%08llx, limitk=%08llx, sizek=%08llx,\n",
- basek, limitk, sizek);
-
- /* split the region to accommodate pci memory space */
- if ((basek < 4 * 1024 * 1024) && (limitk > mmio_basek)) {
- if (basek <= mmio_basek) {
- unsigned int pre_sizek;
- pre_sizek = mmio_basek - basek;
- if (pre_sizek > 0) {
- ram_resource_kb(dev, idx++, basek, pre_sizek);
- sizek -= pre_sizek;
- }
- basek = mmio_basek;
- }
- if ((basek + sizek) <= 4 * 1024 * 1024) {
- sizek = 0;
- }
- else {
- uint64_t topmem2 = get_top_of_mem_above_4gb();
- basek = 4 * 1024 * 1024;
- sizek = topmem2 / 1024 - basek;
- }
- }
-
- ram_resource_kb(dev, idx++, basek, sizek);
- printk(BIOS_DEBUG, "mmio_basek=%08lx, basek=%08llx, limitk=%08llx\n",
- mmio_basek, basek, limitk);
}
+ printk(BIOS_DEBUG, "basek=%08llx, limitk=%08llx, sizek=%08llx,\n",
+ basek, limitk, sizek);
+
+ /* split the region to accommodate pci memory space */
+ if ((basek < 4 * 1024 * 1024) && (limitk > mmio_basek)) {
+ if (basek <= mmio_basek) {
+ unsigned int pre_sizek;
+ pre_sizek = mmio_basek - basek;
+ if (pre_sizek > 0) {
+ ram_resource_kb(dev, idx++, basek, pre_sizek);
+ sizek -= pre_sizek;
+ }
+ basek = mmio_basek;
+ }
+ if ((basek + sizek) <= 4 * 1024 * 1024) {
+ sizek = 0;
+ } else {
+ uint64_t topmem2 = get_top_of_mem_above_4gb();
+ basek = 4 * 1024 * 1024;
+ sizek = topmem2 / 1024 - basek;
+ }
+ }
+
+ ram_resource_kb(dev, idx++, basek, sizek);
+ printk(BIOS_DEBUG, "mmio_basek=%08lx, basek=%08llx, limitk=%08llx\n",
+ mmio_basek, basek, limitk);
+
add_uma_resource_below_tolm(dev, idx++);
}