commit 3e47fc9e94089476fcef4fcafa8547cbb693316b
author Patrick Rudolph <siro@das-labor.org> Wed Jun 07 09:44:07 2017 +0200
committer Martin Roth <martinroth@google.com> Tue Jun 27 16:09:18 2017 +0000
tree 9b5016ac85e7ac31579460173718762e974f5ec1
parent 33906d2347e6cd32a7dd4cda1f7bd27b2d660241

nb/intel/sandybridge: Fill in acpi_name

Fill in acpi_name to return proper ACPI names. To be used with
SSDT generators.

The ACPI names have to match those already used in ASL code.
By providing the ACPI name it can be retrieved by the
acpi_device_name() method and doesn't need to be hardcoded in
SSDT generators any more.

GFX0 is used in drivers/intel/gma/acpi/pch.asl.
MCHC is used in nb/intel/sandybridge/acpi/hostbridge.asl.

Change-Id: I19526e334a9c5435fdb19419a671b86c5f6b2be9
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/20085
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

src/northbridge/intel/sandybridge/gma.c

diff --git a/src/northbridge/intel/sandybridge/gma.c b/src/northbridge/intel/sandybridge/gma.c
index f534930..9611e64 100644
--- a/src/northbridge/intel/sandybridge/gma.c
+++ b/src/northbridge/intel/sandybridge/gma.c
@@ -700,6 +700,11 @@
 	return current;
 }
 
+static const char *gma_acpi_name(device_t dev)
+{
+	return "GFX0";
+}
+
 /* called by pci set_vga_bridge function */
 static void gma_func0_disable(struct device *dev)
 {
@@ -727,6 +732,7 @@
 	.enable			= 0,
 	.disable		= gma_func0_disable,
 	.ops_pci		= &gma_pci_ops,
+	.acpi_name		= gma_acpi_name,
 	.write_acpi_tables	= gma_write_acpi_tables,
 };
 

src/northbridge/intel/sandybridge/northbridge.c

diff --git a/src/northbridge/intel/sandybridge/northbridge.c b/src/northbridge/intel/sandybridge/northbridge.c
index 5c5f41a..635e321 100644
--- a/src/northbridge/intel/sandybridge/northbridge.c
+++ b/src/northbridge/intel/sandybridge/northbridge.c
@@ -242,6 +242,22 @@
 	assign_resources(dev->link_list);
 }
 
+static const char *northbridge_acpi_name(struct device *dev)
+{
+	if (dev->path.type == DEVICE_PATH_DOMAIN)
+		return "PCI0";
+
+	if (dev->path.type != DEVICE_PATH_PCI)
+		return NULL;
+
+	switch (dev->path.pci.devfn) {
+	case PCI_DEVFN(0, 0):
+		return "MCHC";
+	}
+
+	return NULL;
+}
+
 	/* TODO We could determine how many PCIe busses we need in
 	 * the bar. For now that number is hardcoded to a max of 64.
 	 * See e7525/northbridge.c for an example.
@@ -252,8 +268,9 @@
 	.enable_resources = NULL,
 	.init             = NULL,
 	.scan_bus         = pci_domain_scan_bus,
-	.ops_pci_bus	  = pci_bus_default_ops,
+	.ops_pci_bus      = pci_bus_default_ops,
 	.write_acpi_tables = northbridge_write_acpi_tables,
+	.acpi_name        = northbridge_acpi_name,
 };
 
 static void mc_read_resources(device_t dev)