timestamps: Stash early timestamps in CAR_GLOBAL
Change-Id: I87b454c748cf885491d5b38bfe53a2ec0e9f38c5
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/3910
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-by: Aaron Durbin <adurbin@google.com>
diff --git a/src/cpu/intel/haswell/romstage.c b/src/cpu/intel/haswell/romstage.c
index 06e3a85..e62b894 100644
--- a/src/cpu/intel/haswell/romstage.c
+++ b/src/cpu/intel/haswell/romstage.c
@@ -200,16 +200,8 @@
int wake_from_s3;
struct romstage_handoff *handoff;
-#if CONFIG_COLLECT_TIMESTAMPS
- tsc_t start_romstage_time;
- tsc_t before_dram_time;
- tsc_t after_dram_time;
- tsc_t base_time = get_initial_timestamp();
-#endif
-
-#if CONFIG_COLLECT_TIMESTAMPS
- start_romstage_time = rdtsc();
-#endif
+ timestamp_init(get_initial_timestamp());
+ timestamp_add_now(TS_START_ROMSTAGE);
if (params->bist == 0)
enable_lapic();
@@ -249,17 +241,15 @@
post_code(0x3a);
params->pei_data->boot_mode = boot_mode;
-#if CONFIG_COLLECT_TIMESTAMPS
- before_dram_time = rdtsc();
-#endif
+
+ timestamp_add_now(TS_BEFORE_INITRAM);
report_platform_info();
sdram_initialize(params->pei_data);
-#if CONFIG_COLLECT_TIMESTAMPS
- after_dram_time = rdtsc();
-#endif
+ timestamp_add_now(TS_AFTER_INITRAM);
+
post_code(0x3b);
intel_early_me_status();
@@ -288,13 +278,8 @@
#if CONFIG_CHROMEOS
init_chromeos(boot_mode);
#endif
-#if CONFIG_COLLECT_TIMESTAMPS
- timestamp_init(base_time);
- timestamp_add(TS_START_ROMSTAGE, start_romstage_time );
- timestamp_add(TS_BEFORE_INITRAM, before_dram_time );
- timestamp_add(TS_AFTER_INITRAM, after_dram_time );
+ timestamp_sync();
timestamp_add_now(TS_END_ROMSTAGE);
-#endif
}
static inline void prepare_for_resume(struct romstage_handoff *handoff)