diff --git a/src/vendorcode/amd/opensil/genoa_poc/Makefile.inc b/src/vendorcode/amd/opensil/genoa_poc/Makefile.inc
index b09299b..70bf44b 100644
--- a/src/vendorcode/amd/opensil/genoa_poc/Makefile.inc
+++ b/src/vendorcode/amd/opensil/genoa_poc/Makefile.inc
@@ -8,6 +8,7 @@
 romstage-y += opensil_console.c
 romstage-y += romstage.c
 
+ramstage-y += acpi.c
 ramstage-y += memmap.c
 ramstage-y += opensil_console.c
 ramstage-y += ramstage.c
diff --git a/src/vendorcode/amd/opensil/genoa_poc/acpi.c b/src/vendorcode/amd/opensil/genoa_poc/acpi.c
new file mode 100644
index 0000000..a0af4a3
--- /dev/null
+++ b/src/vendorcode/amd/opensil/genoa_poc/acpi.c
@@ -0,0 +1,18 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <acpi/acpi.h>
+#include <Sil-api.h>
+#include <SilCommon.h>
+#include <xSIM-api.h>
+#include <FCH/Common/FchCommonCfg.h>
+#include "opensil.h"
+
+void opensil_fill_fadt_io_ports(acpi_fadt_t *fadt)
+{
+	FCHHWACPI_INPUT_BLK *blk = SilFindStructure(SilId_FchHwAcpiP,  0);
+
+	fadt->pm1a_evt_blk = blk->AcpiPm1EvtBlkAddr;
+	fadt->pm1a_cnt_blk = blk->AcpiPm1CntBlkAddr;
+	fadt->pm_tmr_blk = blk->AcpiPmTmrBlkAddr;
+	fadt->gpe0_blk = blk->AcpiGpe0BlkAddr;
+}
diff --git a/src/vendorcode/amd/opensil/genoa_poc/opensil.h b/src/vendorcode/amd/opensil/genoa_poc/opensil.h
index ecde809..ef19886 100644
--- a/src/vendorcode/amd/opensil/genoa_poc/opensil.h
+++ b/src/vendorcode/amd/opensil/genoa_poc/opensil.h
@@ -9,6 +9,6 @@
 // Add the memory map to dev, starting at index idx, returns last use idx
 int add_opensil_memmap(struct device *dev, int idx);
 // Fill in FADT from opensil
-void opensil_fill_fadt(acpi_fadt_t *fadt);
+void opensil_fill_fadt_io_ports(acpi_fadt_t *fadt);
 
 #endif