libpayload: Parse MTC and fill mtc_start and mtc_size
Parse coreboot table and fill in mtc_start and mtc_size values in
sysinfo structure.
BUG=chrome-os-partner:41125
BRANCH=None
TEST=Compiles successfully and boots to kernel prompt
Change-Id: If210ea0a105f6879686e6e930cb29e66bc5e6cd0
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: b70d0d35c85fa1a2317b0239276d5d9e7a550472
Original-Change-Id: I60b6f8ed4c704bd5ad6cce7fce2b9095babe181e
Original-Signed-off-by: Furquan Shaikh <furquan@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/276778
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-by: Jimmy Zhang <jimmzhang@nvidia.com>
Original-Commit-Queue: Furquan Shaikh <furquan@chromium.org>
Original-Trybot-Ready: Furquan Shaikh <furquan@chromium.org>
Original-Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: http://review.coreboot.org/10563
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
diff --git a/payloads/libpayload/include/coreboot_tables.h b/payloads/libpayload/include/coreboot_tables.h
index 649cc2b..0c516b1 100644
--- a/payloads/libpayload/include/coreboot_tables.h
+++ b/payloads/libpayload/include/coreboot_tables.h
@@ -190,6 +190,7 @@
#define CB_TAG_VBOOT_HANDOFF 0x0020
#define CB_TAG_DMA 0x0022
#define CB_TAG_RAM_OOPS 0x0023
+#define CB_TAG_MTC 0x002b
struct lb_range {
uint32_t tag;
uint32_t size;