ipmi/ocp: Move common OCP/Facebook IPMI OEM codes into drivers/ipmi/ocp
1. These are common OCP/Facebook IPMI OEM commands, move from mainboard
into drivers/ipmi/ocp to avoid code duplication and provide better
reusability.
2. OCP Tioga Pass enables IPMI_OCP driver.
Tested=On OCP Delta Lake and Tioga Pass verify the commands still work
correctly.
Change-Id: Idd116a89239273fd5cc7b06c7768146085a3ed69
Signed-off-by: Johnny Lin <johnny_lin@wiwynn.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49235
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
diff --git a/src/drivers/ipmi/ocp/Makefile.inc b/src/drivers/ipmi/ocp/Makefile.inc
index 8291f82..c77ee4a 100644
--- a/src/drivers/ipmi/ocp/Makefile.inc
+++ b/src/drivers/ipmi/ocp/Makefile.inc
@@ -1 +1,4 @@
ramstage-$(CONFIG_IPMI_OCP) += ipmi_ocp.c
+ifeq ($(CONFIG_IPMI_OCP),y)
+romstage-$(CONFIG_IPMI_KCS_ROMSTAGE) += ipmi_ocp_romstage.c
+endif
diff --git a/src/drivers/ipmi/ocp/ipmi_ocp.c b/src/drivers/ipmi/ocp/ipmi_ocp.c
index 07628ee..ee38bb0 100644
--- a/src/drivers/ipmi/ocp/ipmi_ocp.c
+++ b/src/drivers/ipmi/ocp/ipmi_ocp.c
@@ -12,6 +12,7 @@
#include <device/device.h>
#include <device/pnp.h>
#include <drivers/ipmi/ipmi_kcs.h>
+#include <drivers/ocp/dmi/ocp_dmi.h>
#include <intelblocks/cpulib.h>
#include <string.h>
#include <types.h>
@@ -115,6 +116,30 @@
printk(BIOS_ERR, "IPMI BMC set param 2 processor info failed\n");
}
+static enum cb_err ipmi_set_ppin(struct device *dev)
+{
+ int ret;
+ struct ipmi_rsp rsp;
+ struct ppin_req req = {0};
+
+ req.cpu0_lo = xeon_sp_ppin[0].lo;
+ req.cpu0_hi = xeon_sp_ppin[0].hi;
+ if (CONFIG_MAX_SOCKET > 1) {
+ req.cpu1_lo = xeon_sp_ppin[1].lo;
+ req.cpu1_hi = xeon_sp_ppin[1].hi;
+ }
+ ret = ipmi_kcs_message(dev->path.pnp.port, IPMI_NETFN_OEM, 0x0, IPMI_OEM_SET_PPIN,
+ (const unsigned char *) &req, sizeof(req), (unsigned char *) &rsp, sizeof(rsp));
+
+ if (ret < sizeof(struct ipmi_rsp) || rsp.completion_code) {
+ printk(BIOS_ERR, "IPMI: %s command failed (ret=%d resp=0x%x)\n",
+ __func__, ret, rsp.completion_code);
+ return CB_ERR;
+ }
+ printk(BIOS_DEBUG, "IPMI: %s command success\n", __func__);
+ return CB_SUCCESS;
+}
+
static void ipmi_ocp_init(struct device *dev)
{
/* Add OCP specific IPMI command */
@@ -126,6 +151,8 @@
/* Send processor information */
ipmi_set_processor_information(dev);
+ if (CONFIG(OCP_DMI))
+ ipmi_set_ppin(dev);
}
static void ipmi_set_resources(struct device *dev)
diff --git a/src/drivers/ipmi/ocp/ipmi_ocp.h b/src/drivers/ipmi/ocp/ipmi_ocp.h
index 96b0086..0c9f452 100644
--- a/src/drivers/ipmi/ocp/ipmi_ocp.h
+++ b/src/drivers/ipmi/ocp/ipmi_ocp.h
@@ -7,6 +7,12 @@
#include <cpu/x86/name.h>
#include "drivers/ipmi/ipmi_kcs.h"
+#define IPMI_NETFN_OEM 0x30
+#define IPMI_OEM_SET_PPIN 0x77
+#define IPMI_BMC_SET_POST_START 0x73
+#define IPMI_OEM_SET_BIOS_BOOT_ORDER 0x52
+#define IPMI_OEM_GET_BIOS_BOOT_ORDER 0x53
+
#define IPMI_NETFN_OEM_COMMON 0x36
#define IPMI_BMC_SET_PROCESSOR_INFORMATION 0x10
#define IPMI_BMC_GET_PROCESSOR_INFORMATION 0x11
@@ -14,6 +20,12 @@
#define MSR_CORE_THREAD_COUNT 0x35
#define MSR_PLATFORM_INFO 0xce
+#define CMOS_BIT (1 << 1)
+#define VALID_BIT (1 << 7)
+#define CLEAR_CMOS_AND_VALID_BIT(x) ((x) &= ~(CMOS_BIT | VALID_BIT))
+#define SET_CMOS_AND_VALID_BIT(x) ((x) |= (CMOS_BIT | VALID_BIT))
+#define IS_CMOS_AND_VALID_BIT(x) ((x)&CMOS_BIT && (x)&VALID_BIT)
+
struct ipmi_processor_info_req {
uint8_t manufacturer_id[3];
uint8_t index;
@@ -33,4 +45,22 @@
char revision[2];
} __packed;
+struct ppin_req {
+ uint32_t cpu0_lo;
+ uint32_t cpu0_hi;
+ uint32_t cpu1_lo;
+ uint32_t cpu1_hi;
+} __packed;
+
+struct boot_order {
+ uint8_t boot_mode;
+ uint8_t boot_dev0;
+ uint8_t boot_dev1;
+ uint8_t boot_dev2;
+ uint8_t boot_dev3;
+ uint8_t boot_dev4;
+} __packed;
+
+enum cb_err ipmi_set_post_start(const int port);
+enum cb_err ipmi_set_cmos_clear(void);
#endif
diff --git a/src/drivers/ipmi/ocp/ipmi_ocp_romstage.c b/src/drivers/ipmi/ocp/ipmi_ocp_romstage.c
new file mode 100644
index 0000000..8e43d8d
--- /dev/null
+++ b/src/drivers/ipmi/ocp/ipmi_ocp_romstage.c
@@ -0,0 +1,76 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#include <console/console.h>
+#include <drivers/ipmi/ipmi_kcs.h>
+
+#include "ipmi_ocp.h"
+
+enum cb_err ipmi_set_post_start(const int port)
+{
+ int ret;
+ struct ipmi_rsp rsp;
+
+ ret = ipmi_kcs_message(port, IPMI_NETFN_OEM, 0x0,
+ IPMI_BMC_SET_POST_START, NULL, 0, (u8 *) &rsp,
+ sizeof(rsp));
+
+ if (ret < sizeof(struct ipmi_rsp) || rsp.completion_code) {
+ printk(BIOS_ERR, "IPMI: %s command failed (ret=%d rsp=0x%x)\n",
+ __func__, ret, rsp.completion_code);
+ return CB_ERR;
+ }
+ if (ret != sizeof(rsp)) {
+ printk(BIOS_ERR, "IPMI: %s response truncated\n", __func__);
+ return CB_ERR;
+ }
+
+ printk(BIOS_DEBUG, "IPMI BMC POST is started\n");
+ return CB_SUCCESS;
+}
+
+enum cb_err ipmi_set_cmos_clear(void)
+{
+ int ret;
+
+ struct ipmi_oem_rsp {
+ struct ipmi_rsp resp;
+ struct boot_order data;
+ } __packed;
+
+ struct ipmi_oem_rsp rsp;
+ struct boot_order req;
+
+ /* IPMI OEM get bios boot order command to check if the valid bit and
+ the CMOS clear bit are both set from the response BootMode byte. */
+ ret = ipmi_kcs_message(CONFIG_BMC_KCS_BASE, IPMI_NETFN_OEM, 0x0,
+ IPMI_OEM_GET_BIOS_BOOT_ORDER,
+ NULL, 0,
+ (unsigned char *) &rsp, sizeof(rsp));
+
+ if (ret < sizeof(struct ipmi_rsp) || rsp.resp.completion_code) {
+ printk(BIOS_ERR, "IPMI: %s command failed (read ret=%d resp=0x%x)\n",
+ __func__, ret, rsp.resp.completion_code);
+ return CB_ERR;
+ }
+
+ if (!IS_CMOS_AND_VALID_BIT(rsp.data.boot_mode)) {
+ req = rsp.data;
+ SET_CMOS_AND_VALID_BIT(req.boot_mode);
+ ret = ipmi_kcs_message(CONFIG_BMC_KCS_BASE, IPMI_NETFN_OEM, 0x0,
+ IPMI_OEM_SET_BIOS_BOOT_ORDER,
+ (const unsigned char *) &req, sizeof(req),
+ (unsigned char *) &rsp, sizeof(rsp));
+
+ if (ret < sizeof(struct ipmi_rsp) || rsp.resp.completion_code) {
+ printk(BIOS_ERR, "IPMI: %s command failed (sent ret=%d resp=0x%x)\n",
+ __func__, ret, rsp.resp.completion_code);
+ return CB_ERR;
+ }
+
+ printk(BIOS_INFO, "IPMI CMOS clear requested because CMOS data is invalid.\n");
+
+ return CB_SUCCESS;
+ }
+
+ return CB_SUCCESS;
+}
diff --git a/src/mainboard/ocp/deltalake/ipmi.c b/src/mainboard/ocp/deltalake/ipmi.c
index 7adbcf2..9022215 100644
--- a/src/mainboard/ocp/deltalake/ipmi.c
+++ b/src/mainboard/ocp/deltalake/ipmi.c
@@ -3,30 +3,13 @@
#include <console/console.h>
#include <drivers/ipmi/ipmi_kcs.h>
#include <drivers/ipmi/ipmi_ops.h>
+#include <drivers/ipmi/ocp/ipmi_ocp.h>
#include <drivers/vpd/vpd.h>
#include <string.h>
#include "ipmi.h"
#include "vpd.h"
-enum cb_err ipmi_set_ppin(struct ppin_req *req)
-{
- int ret;
- struct ipmi_rsp rsp;
-
- ret = ipmi_kcs_message(CONFIG_BMC_KCS_BASE, IPMI_NETFN_OEM, 0x0, IPMI_OEM_SET_PPIN,
- (const unsigned char *) req, sizeof(*req),
- (unsigned char *) &rsp, sizeof(rsp));
-
- if (ret < sizeof(struct ipmi_rsp) || rsp.completion_code) {
- printk(BIOS_ERR, "IPMI: %s command failed (ret=%d resp=0x%x)\n",
- __func__, ret, rsp.completion_code);
- return CB_ERR;
- }
-
- return CB_SUCCESS;
-}
-
enum cb_err ipmi_get_pcie_config(uint8_t *pcie_config)
{
int ret;
@@ -75,29 +58,6 @@
return CB_SUCCESS;
}
-enum cb_err ipmi_set_post_start(const int port)
-{
- int ret;
- struct ipmi_rsp rsp;
-
- ret = ipmi_kcs_message(port, IPMI_NETFN_OEM, 0x0,
- IPMI_BMC_SET_POST_START, NULL, 0, (u8 *) &rsp,
- sizeof(rsp));
-
- if (ret < sizeof(struct ipmi_rsp) || rsp.completion_code) {
- printk(BIOS_ERR, "IPMI: %s command failed (ret=%d rsp=0x%x)\n",
- __func__, ret, rsp.completion_code);
- return CB_ERR;
- }
- if (ret != sizeof(rsp)) {
- printk(BIOS_ERR, "IPMI: %s response truncated\n", __func__);
- return CB_ERR;
- }
-
- printk(BIOS_DEBUG, "IPMI BMC POST is started\n");
- return CB_SUCCESS;
-}
-
void init_frb2_wdt(void)
{
uint8_t enable;
@@ -135,51 +95,3 @@
ipmi_stop_bmc_wdt(CONFIG_BMC_KCS_BASE);
}
}
-
-enum cb_err ipmi_set_cmos_clear(void)
-{
- int ret;
-
- struct ipmi_oem_rsp {
- struct ipmi_rsp resp;
- struct boot_order data;
- } __packed;
-
- struct ipmi_oem_rsp rsp;
- struct boot_order req;
-
- /* IPMI OEM get bios boot order command to check if the valid bit and
- the CMOS clear bit are both set from the response BootMode byte. */
-
- ret = ipmi_kcs_message(CONFIG_BMC_KCS_BASE, IPMI_NETFN_OEM, 0x0,
- IPMI_OEM_GET_BIOS_BOOT_ORDER,
- NULL, 0,
- (unsigned char *) &rsp, sizeof(rsp));
-
- if (ret < sizeof(struct ipmi_rsp) || rsp.resp.completion_code) {
- printk(BIOS_ERR, "IPMI: %s command failed (read ret=%d resp=0x%x)\n",
- __func__, ret, rsp.resp.completion_code);
- return CB_ERR;
- }
-
- if (!IS_CMOS_AND_VALID_BIT(rsp.data.boot_mode)) {
- req = rsp.data;
- SET_CMOS_AND_VALID_BIT(req.boot_mode);
- ret = ipmi_kcs_message(CONFIG_BMC_KCS_BASE, IPMI_NETFN_OEM, 0x0,
- IPMI_OEM_SET_BIOS_BOOT_ORDER,
- (const unsigned char *) &req, sizeof(req),
- (unsigned char *) &rsp, sizeof(rsp));
-
- if (ret < sizeof(struct ipmi_rsp) || rsp.resp.completion_code) {
- printk(BIOS_ERR, "IPMI: %s command failed (sent ret=%d resp=0x%x)\n",
- __func__, ret, rsp.resp.completion_code);
- return CB_ERR;
- }
-
- printk(BIOS_INFO, "IPMI CMOS clear requested because CMOS data is invalid.\n");
-
- return CB_SUCCESS;
- }
-
- return CB_SUCCESS;
-}
diff --git a/src/mainboard/ocp/deltalake/ipmi.h b/src/mainboard/ocp/deltalake/ipmi.h
index 440a505..269fc03 100644
--- a/src/mainboard/ocp/deltalake/ipmi.h
+++ b/src/mainboard/ocp/deltalake/ipmi.h
@@ -5,19 +5,9 @@
#include <stdint.h>
-#define IPMI_NETFN_OEM 0x30
-#define IPMI_OEM_SET_PPIN 0x77
-#define IPMI_OEM_GET_PCIE_CONFIG 0xf4
-#define IPMI_OEM_GET_BOARD_ID 0x37
-#define IPMI_BMC_SET_POST_START 0x73
-#define IPMI_OEM_SET_BIOS_BOOT_ORDER 0x52
-#define IPMI_OEM_GET_BIOS_BOOT_ORDER 0x53
+#define IPMI_OEM_GET_PCIE_CONFIG 0xf4
+#define IPMI_OEM_GET_BOARD_ID 0x37
-#define CMOS_BIT (1 << 1)
-#define VALID_BIT (1 << 7)
-#define CLEAR_CMOS_AND_VALID_BIT(x) ((x) &= ~(CMOS_BIT | VALID_BIT))
-#define SET_CMOS_AND_VALID_BIT(x) ((x) |= (CMOS_BIT | VALID_BIT))
-#define IS_CMOS_AND_VALID_BIT(x) ((x)&CMOS_BIT && (x)&VALID_BIT)
enum config_type {
PCIE_CONFIG_UNKNOWN = 0x0,
@@ -27,26 +17,8 @@
PCIE_CONFIG_D = 0x4,
};
-struct ppin_req {
- uint32_t cpu0_lo;
- uint32_t cpu0_hi;
- uint32_t cpu1_lo;
- uint32_t cpu1_hi;
-} __packed;
-
-struct boot_order {
- uint8_t boot_mode;
- uint8_t boot_dev0;
- uint8_t boot_dev1;
- uint8_t boot_dev2;
- uint8_t boot_dev3;
- uint8_t boot_dev4;
-} __packed;
-
-enum cb_err ipmi_set_ppin(struct ppin_req *req);
enum cb_err ipmi_get_pcie_config(uint8_t *config);
enum cb_err ipmi_get_slot_id(uint8_t *slot_id);
-enum cb_err ipmi_set_post_start(const int port);
void init_frb2_wdt(void);
-enum cb_err ipmi_set_cmos_clear(void);
+
#endif
diff --git a/src/mainboard/ocp/deltalake/ramstage.c b/src/mainboard/ocp/deltalake/ramstage.c
index 4a3e385..40810b6 100644
--- a/src/mainboard/ocp/deltalake/ramstage.c
+++ b/src/mainboard/ocp/deltalake/ramstage.c
@@ -353,13 +353,6 @@
static void mainboard_final(void *chip_info)
{
- struct ppin_req req = {0};
-
- req.cpu0_lo = xeon_sp_ppin[0].lo;
- req.cpu0_hi = xeon_sp_ppin[0].hi;
- /* Set PPIN to BMC */
- if (ipmi_set_ppin(&req) != CB_SUCCESS)
- printk(BIOS_ERR, "ipmi_set_ppin failed\n");
}
struct chip_operations mainboard_ops = {
diff --git a/src/mainboard/ocp/deltalake/romstage.c b/src/mainboard/ocp/deltalake/romstage.c
index 9b182a21..0a7ecf1 100644
--- a/src/mainboard/ocp/deltalake/romstage.c
+++ b/src/mainboard/ocp/deltalake/romstage.c
@@ -2,6 +2,7 @@
#include <console/console.h>
#include <drivers/ipmi/ipmi_kcs.h>
+#include <drivers/ipmi/ocp/ipmi_ocp.h>
#include <drivers/vpd/vpd.h>
#include <fsp/api.h>
#include <FspmUpd.h>
diff --git a/src/mainboard/ocp/tiogapass/Kconfig b/src/mainboard/ocp/tiogapass/Kconfig
index 67c1fa9..2ead76d 100644
--- a/src/mainboard/ocp/tiogapass/Kconfig
+++ b/src/mainboard/ocp/tiogapass/Kconfig
@@ -8,6 +8,7 @@
select HAVE_ACPI_TABLES
select IPMI_KCS
select IPMI_KCS_ROMSTAGE
+ select IPMI_OCP
select MAINBOARD_USES_FSP2_0
select OCP_DMI
select PARALLEL_MP_AP_WORK
diff --git a/src/mainboard/ocp/tiogapass/devicetree.cb b/src/mainboard/ocp/tiogapass/devicetree.cb
index 488f677..833bb20 100644
--- a/src/mainboard/ocp/tiogapass/devicetree.cb
+++ b/src/mainboard/ocp/tiogapass/devicetree.cb
@@ -76,6 +76,9 @@
register "bmc_i2c_address" = "0x20"
register "bmc_boot_timeout" = "90"
end
+ chip drivers/ipmi/ocp # OCP specific IPMI porting
+ device pnp ca2.1 on end
+ end
end # Intel Corporation C621 Series Chipset LPC/eSPI Controller
device pci 1f.1 hidden end # p2sb
device pci 1f.2 on end # Intel Corporation C620 Series Chipset Family Power Management Controller
diff --git a/src/mainboard/ocp/tiogapass/ipmi.c b/src/mainboard/ocp/tiogapass/ipmi.c
index 0cdf110..74f96fe 100644
--- a/src/mainboard/ocp/tiogapass/ipmi.c
+++ b/src/mainboard/ocp/tiogapass/ipmi.c
@@ -3,29 +3,13 @@
#include <console/console.h>
#include <drivers/ipmi/ipmi_kcs.h>
#include <drivers/ipmi/ipmi_ops.h>
+#include <drivers/ipmi/ocp/ipmi_ocp.h>
#include <drivers/vpd/vpd.h>
#include <string.h>
#include "ipmi.h"
#include "vpd.h"
-void ipmi_set_ppin(struct ppin_req *req)
-{
- int ret;
- struct ipmi_rsp rsp;
-
- ret = ipmi_kcs_message(CONFIG_BMC_KCS_BASE, IPMI_NETFN_OEM, 0x0, IPMI_OEM_SET_PPIN,
- (const unsigned char *) req, sizeof(*req),
- (unsigned char *) &rsp, sizeof(rsp));
-
- if (ret < sizeof(struct ipmi_rsp) || rsp.completion_code) {
- printk(BIOS_ERR, "IPMI: %s command failed (ret=%d resp=0x%x)\n",
- __func__, ret, rsp.completion_code);
- return;
- }
- printk(BIOS_DEBUG, "IPMI Set PPIN to BMC done.\n");
-}
-
void init_frb2_wdt(void)
{
char val[VPD_LEN];
diff --git a/src/mainboard/ocp/tiogapass/ipmi.h b/src/mainboard/ocp/tiogapass/ipmi.h
index 798f312..93101c2 100644
--- a/src/mainboard/ocp/tiogapass/ipmi.h
+++ b/src/mainboard/ocp/tiogapass/ipmi.h
@@ -4,17 +4,5 @@
#define TIOGAPASS_IPMI_H
#include <types.h>
-#define IPMI_NETFN_OEM 0x30
-#define IPMI_OEM_SET_PPIN 0x77
-
-/* PPIN for 2 CPU IPMI request */
-struct ppin_req {
- uint32_t cpu0_lo;
- uint32_t cpu0_hi;
- uint32_t cpu1_lo;
- uint32_t cpu1_hi;
-} __packed;
-/* Send CPU0 and CPU1 PPIN to BMC */
-void ipmi_set_ppin(struct ppin_req *req);
void init_frb2_wdt(void);
#endif
diff --git a/src/mainboard/ocp/tiogapass/ramstage.c b/src/mainboard/ocp/tiogapass/ramstage.c
index 29148d1..df77205 100644
--- a/src/mainboard/ocp/tiogapass/ramstage.c
+++ b/src/mainboard/ocp/tiogapass/ramstage.c
@@ -7,8 +7,6 @@
#include <soc/ramstage.h>
#include <soc/lewisburg_pch_gpio_defs.h>
-#include "ipmi.h"
-
extern struct fru_info_str fru_strings;
static const struct port_information SMBIOS_type8_info[] = {
@@ -185,14 +183,6 @@
static void mainboard_final(void *chip_info)
{
- struct ppin_req req;
-
- req.cpu0_lo = xeon_sp_ppin[0].lo;
- req.cpu0_hi = xeon_sp_ppin[0].hi;
- req.cpu1_lo = xeon_sp_ppin[1].lo;
- req.cpu1_hi = xeon_sp_ppin[1].hi;
- /* Set PPIN to BMC */
- ipmi_set_ppin(&req);
}
struct chip_operations mainboard_ops = {
diff --git a/src/mainboard/ocp/tiogapass/romstage.c b/src/mainboard/ocp/tiogapass/romstage.c
index fb2ce02..20c7466 100644
--- a/src/mainboard/ocp/tiogapass/romstage.c
+++ b/src/mainboard/ocp/tiogapass/romstage.c
@@ -3,6 +3,7 @@
#include <fsp/api.h>
#include <FspmUpd.h>
#include <drivers/ipmi/ipmi_kcs.h>
+#include <drivers/ipmi/ocp/ipmi_ocp.h>
#include <soc/romstage.h>
#include <string.h>
#include <gpio.h>
@@ -53,8 +54,10 @@
void mainboard_memory_init_params(FSPM_UPD *mupd)
{
/* It's better to run get BMC selftest result first */
- if (ipmi_kcs_premem_init(CONFIG_BMC_KCS_BASE, 0) == CB_SUCCESS)
+ if (ipmi_kcs_premem_init(CONFIG_BMC_KCS_BASE, 0) == CB_SUCCESS) {
+ ipmi_set_post_start(CONFIG_BMC_KCS_BASE);
init_frb2_wdt();
+ }
mainboard_config_iio(mupd);
/* do not configure GPIO controller inside FSP-M */