tree f0d448c5190ae5d9bb1b12b11030ca5d41e9400d
parent c11059550342999c382385ef0059349802061a99
author Jonathan Zhang <jonzhang@fb.com> 1586558886 -0700
committer Patrick Georgi <pgeorgi@google.com> 1592153175 +0000

soc/intel/xeon_sp/cpx: configure FSP-M UPD parameters

Configure FSP-M UPD parameters.

TESTED=Boot CPX-SP based server.

Signed-off-by: Jonathan Zhang <jonzhang@fb.com>
Signed-off-by: Reddy Chagam <anjaneya.chagam@intel.com>
Change-Id: I2d0762a742d8803c7396034e3244120c1e8ece67
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40385
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>