nb/intel/pineview: Clean up code and comments
- Reformat some lines of code
- Put names to all MCHBAR registers in a separate file
- Rewrite several comments
- Use C-style comments for consistency
- Rewrite some hex constants
- Use HOST_BRIDGE instead of PCI_DEV(0, 0, 0)
- Align a bunch of things
Tested with BUILD_TIMELESS=1, foxconn/d41s remains unaffected.
Change-Id: I29104b0c24d66c6f49844f99d62ec433bb31bdaf
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39414
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
diff --git a/src/northbridge/intel/pineview/romstage.c b/src/northbridge/intel/pineview/romstage.c
index ce4cd55..9a8f5d5 100644
--- a/src/northbridge/intel/pineview/romstage.c
+++ b/src/northbridge/intel/pineview/romstage.c
@@ -13,10 +13,6 @@
* GNU General Public License for more details.
*/
-/* Platform has no romstage entry point under mainboard directory,
- * so this one is named with prefix mainboard.
- */
-
#include <timestamp.h>
#include <console/console.h>
#include <device/pci_ops.h>
@@ -32,7 +28,7 @@
static void rcba_config(void)
{
- /* Set up virtual channel 0 */
+ /* Set up Virtual Channel 0 */
RCBA32(0x0014) = 0x80000001;
RCBA32(0x001c) = 0x03128010;
}
@@ -41,8 +37,7 @@
{
}
-#define LPC_DEV PCI_DEV(0x0, 0x1f, 0x0)
-
+/* The romstage entry point for this platform is not mainboard-specific, hence the name. */
void mainboard_romstage_entry(void)
{
u8 spd_addrmap[4] = {};
@@ -51,11 +46,9 @@
enable_lapic();
- /* Perform some early chipset initialization required
- * before RAM initialization can work
- */
+ /* Do some early chipset init, necessary for RAM init to work */
i82801gx_early_init();
- pineview_early_initialization();
+ pineview_early_init();
post_code(0x30);
@@ -64,7 +57,7 @@
if (s3resume) {
boot_path = BOOT_PATH_RESUME;
} else {
- if (MCHBAR32(0xf14) & (1 << 8)) /* HOT RESET */
+ if (MCHBAR32(PMSTS) & (1 << 8)) /* HOT RESET */
boot_path = BOOT_PATH_RESET;
else
boot_path = BOOT_PATH_NORMAL;