This code provides cpu northbridge initialization for Family 14h cpus. It is dependent on the AMD Agesa code.

Signed-off-by: Frank Vibrans <frank.vibrans@amd.com>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Marc Jones <marcj303@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6345 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
diff --git a/src/northbridge/amd/agesa_wrapper/family14/Kconfig b/src/northbridge/amd/agesa_wrapper/family14/Kconfig
new file mode 100644
index 0000000..015f1d1
--- /dev/null
+++ b/src/northbridge/amd/agesa_wrapper/family14/Kconfig
@@ -0,0 +1,79 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2007-2009 coresystems GmbH
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; version 2 of the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+##
+config NORTHBRIDGE_AMD_AGESA_WRAPPER_FAMILY14
+	bool
+	select HAVE_DEBUG_RAM_SETUP
+	select HAVE_DEBUG_SMBUS
+	select HYPERTRANSPORT_PLUGIN_SUPPORT
+	select MMCONF_SUPPORT
+	select NORTHBRIDGE_AMD_AGESA_WRAPPER_FAMILY14_ROOT_COMPLEX
+
+config HT3_SUPPORT
+	bool
+	default y
+	depends on NORTHBRIDGE_AMD_AGESA_WRAPPER_FAMILY14
+
+config HW_MEM_HOLE_SIZEK
+	hex
+	default 0x100000
+	depends on NORTHBRIDGE_AMD_AGESA_WRAPPER_FAMILY14
+
+config HW_MEM_HOLE_SIZE_AUTO_INC
+	bool
+	default n
+	depends on NORTHBRIDGE_AMD_AGESA_WRAPPER_FAMILY14
+
+config MMCONF_BASE_ADDRESS
+	hex
+	default 0xe0000000
+  depends on NORTHBRIDGE_AMD_AGESA_WRAPPER_FAMILY14
+
+config MMCONF_BUS_NUMBER
+	int
+	default 256
+	depends on NORTHBRIDGE_AMD_AGESA_WRAPPER_FAMILY14
+
+config DIMM_DDR3
+	bool
+	default n
+	depends on NORTHBRIDGE_AMD_AGESA_WRAPPER_FAMILY14
+
+config DIMM_REGISTERED
+	bool
+	default n
+	depends on NORTHBRIDGE_AMD_AGESA_WRAPPER_FAMILY14
+
+if !DIMM_REGISTERED
+	config DIMM_SUPPORT
+		hex
+		default 0x0004
+endif
+
+if DIMM_DDR3
+	if DIMM_REGISTERED
+	  config DIMM_SUPPORT
+		  hex
+		  default 0x0005
+	endif
+endif
+
+config BOOTBLOCK_NORTHBRIDGE_INIT
+  string
+  default "northbridge/amd/agesa_wrapper/family14/bootblock.c"
+	depends on NORTHBRIDGE_AMD_AGESA_WRAPPER_FAMILY14