janitor task: unify and cleanup naming.
cache_as_ram_auto.c and auto.c are both called "romstage.c" now.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5092 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
diff --git a/src/arch/i386/lib/console_print.c b/src/arch/i386/lib/console_print.c
index 661dc41..0aa540d1 100644
--- a/src/arch/i386/lib/console_print.c
+++ b/src/arch/i386/lib/console_print.c
@@ -63,7 +63,7 @@
}
/* Actually this should say defined(__ROMCC__) but that define is explicitly
- * set in some auto.c files to trigger the simple device_t version to be used.
+ * set in some romstage.c files to trigger the simple device_t version to be used.
* So __GNUCC__ does the right thing here.
*/
#if defined (__ROMCC__)
diff --git a/src/cpu/amd/dualcore/amd_sibling.c b/src/cpu/amd/dualcore/amd_sibling.c
index deaa78c..9001ec7 100644
--- a/src/cpu/amd/dualcore/amd_sibling.c
+++ b/src/cpu/amd/dualcore/amd_sibling.c
@@ -78,7 +78,7 @@
nb_cfg_54 = read_nb_cfg_54();
#if 0
- //it is for all e0 single core and nc_cfg_54 low is set, but in the auto.c stage we do not set that bit for it.
+ //it is for all e0 single core and nc_cfg_54 low is set, but in the romstage.c stage we do not set that bit for it.
if(nb_cfg_54 && (!disable_siblings) && (siblings == 0)) {
//we need to check if e0 single core is there
int i;
@@ -109,7 +109,7 @@
if((apicid_base+ioapic_num-1)>0xf) {
// We need to enable APIC EXT ID
- printk_info("if the IO APIC device doesn't support 256 apic id, \r\n you need to set CONFIG_ENABLE_APIC_EXT_ID in auto.c so you can spare 16 id for ioapic\r\n");
+ printk_info("if the IO APIC device doesn't support 256 apic id, \r\n you need to set CONFIG_ENABLE_APIC_EXT_ID in romstage.c so you can spare 16 id for ioapic\r\n");
enable_apic_ext_id(nodes);
}
diff --git a/src/cpu/amd/model_10xxx/init_cpus.c b/src/cpu/amd/model_10xxx/init_cpus.c
index defbce2..822e362 100644
--- a/src/cpu/amd/model_10xxx/init_cpus.c
+++ b/src/cpu/amd/model_10xxx/init_cpus.c
@@ -463,7 +463,7 @@
* start the core0 in node, so it can generate HT packet to feature code.
*
* This function starts the AP nodes core0s. wait_all_core0_started() in
- * cache_as_ram_auto.c waits for all the AP to be finished before continuing
+ * romstage.c waits for all the AP to be finished before continuing
* system init.
*/
static void start_node(u8 node)
diff --git a/src/cpu/amd/sc520/raminit.c b/src/cpu/amd/sc520/raminit.c
index d202807..f52e8fe 100644
--- a/src/cpu/amd/sc520/raminit.c
+++ b/src/cpu/amd/sc520/raminit.c
@@ -89,7 +89,7 @@
/* as per the book: */
/* PAR register setup */
/* set up the PAR registers as they are on the MSM586SEG */
- /* moved to auto.c by Stepan, Ron says: */
+ /* moved to romstage.c by Stepan, Ron says: */
/* NOTE: move this to mainboard.c ASAP */
setup_pars();
diff --git a/src/mainboard/Makefile.k8_CAR.inc b/src/mainboard/Makefile.k8_CAR.inc
index 35405f6..3152504 100644
--- a/src/mainboard/Makefile.k8_CAR.inc
+++ b/src/mainboard/Makefile.k8_CAR.inc
@@ -38,7 +38,7 @@
crt0s += $(src)/cpu/x86/16bit/reset16.inc
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -55,8 +55,8 @@
$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/mainboard/$(MAINBOARDDIR)/dsdt.c
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/Makefile.k8_ck804.inc b/src/mainboard/Makefile.k8_ck804.inc
index 5c146b0..9472cf2 100644
--- a/src/mainboard/Makefile.k8_ck804.inc
+++ b/src/mainboard/Makefile.k8_ck804.inc
@@ -42,7 +42,7 @@
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/southbridge/nvidia/ck804/romstrap.inc
crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -60,8 +60,8 @@
$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/mainboard/$(MAINBOARDDIR)/dsdt.c
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/Makefile.romccboard.inc b/src/mainboard/Makefile.romccboard.inc
index c1462ae22..3d3bc24 100644
--- a/src/mainboard/Makefile.romccboard.inc
+++ b/src/mainboard/Makefile.romccboard.inc
@@ -42,7 +42,7 @@
ifeq ($(CONFIG_BIG_BOOTBLOCK),y)
crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/failover.inc
endif
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ifeq ($(CONFIG_SSE),y)
crt0s += $(src)/cpu/x86/sse_disable.inc
endif
@@ -75,11 +75,11 @@
$(obj)/romcc $(ROMCCFLAGS) --label-prefix=failover $(INCLUDES) $(src)/arch/i386/lib/failover.c -o $@
ifeq ($(CONFIG_HAVE_OPTION_TABLE),y)
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(obj)/romcc $(src)/mainboard/$(MAINBOARDDIR)/auto.c $(obj)/option_table.h $(obj)/build.h
- $(obj)/romcc $(ROMCCFLAGS) $(INCLUDES) $(src)/mainboard/$(MAINBOARDDIR)/auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(obj)/romcc $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h $(obj)/build.h
+ $(obj)/romcc $(ROMCCFLAGS) $(INCLUDES) $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
else
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(obj)/romcc $(src)/mainboard/$(MAINBOARDDIR)/auto.c $(obj)/build.h
- $(obj)/romcc $(ROMCCFLAGS) $(INCLUDES) $(src)/mainboard/$(MAINBOARDDIR)/auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(obj)/romcc $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/build.h
+ $(obj)/romcc $(ROMCCFLAGS) $(INCLUDES) $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
endif
endif
diff --git a/src/mainboard/a-trend/atc-6220/auto.c b/src/mainboard/a-trend/atc-6220/romstage.c
similarity index 100%
rename from src/mainboard/a-trend/atc-6220/auto.c
rename to src/mainboard/a-trend/atc-6220/romstage.c
diff --git a/src/mainboard/a-trend/atc-6240/auto.c b/src/mainboard/a-trend/atc-6240/romstage.c
similarity index 100%
rename from src/mainboard/a-trend/atc-6240/auto.c
rename to src/mainboard/a-trend/atc-6240/romstage.c
diff --git a/src/mainboard/abit/be6-ii_v2_0/auto.c b/src/mainboard/abit/be6-ii_v2_0/romstage.c
similarity index 100%
rename from src/mainboard/abit/be6-ii_v2_0/auto.c
rename to src/mainboard/abit/be6-ii_v2_0/romstage.c
diff --git a/src/mainboard/advantech/pcm-5820/auto.c b/src/mainboard/advantech/pcm-5820/romstage.c
similarity index 100%
rename from src/mainboard/advantech/pcm-5820/auto.c
rename to src/mainboard/advantech/pcm-5820/romstage.c
diff --git a/src/mainboard/amd/db800/Makefile.inc b/src/mainboard/amd/db800/Makefile.inc
index e8ed490..fd5ffff 100644
--- a/src/mainboard/amd/db800/Makefile.inc
+++ b/src/mainboard/amd/db800/Makefile.inc
@@ -11,7 +11,7 @@
crt0s += $(src)/cpu/x86/16bit/reset16.inc
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/cpu/amd/model_lx/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -21,8 +21,8 @@
ifdef POST_EVALUATION
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/build.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/build.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/amd/db800/cache_as_ram_auto.c b/src/mainboard/amd/db800/romstage.c
similarity index 100%
rename from src/mainboard/amd/db800/cache_as_ram_auto.c
rename to src/mainboard/amd/db800/romstage.c
diff --git a/src/mainboard/amd/dbm690t/Makefile.inc b/src/mainboard/amd/dbm690t/Makefile.inc
index 968e4d6..7a4a169 100644
--- a/src/mainboard/amd/dbm690t/Makefile.inc
+++ b/src/mainboard/amd/dbm690t/Makefile.inc
@@ -38,7 +38,7 @@
crt0s += $(src)/cpu/x86/16bit/reset16.inc
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -55,8 +55,8 @@
$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/amd/dbm690t/cache_as_ram_auto.c b/src/mainboard/amd/dbm690t/romstage.c
similarity index 100%
rename from src/mainboard/amd/dbm690t/cache_as_ram_auto.c
rename to src/mainboard/amd/dbm690t/romstage.c
diff --git a/src/mainboard/amd/norwich/Makefile.inc b/src/mainboard/amd/norwich/Makefile.inc
index f101f22..0e4b263 100644
--- a/src/mainboard/amd/norwich/Makefile.inc
+++ b/src/mainboard/amd/norwich/Makefile.inc
@@ -12,7 +12,7 @@
crt0s += $(src)/cpu/x86/16bit/reset16.inc
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/cpu/amd/model_lx/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -22,8 +22,8 @@
ifdef POST_EVALUATION
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/build.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/build.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/amd/norwich/cache_as_ram_auto.c b/src/mainboard/amd/norwich/romstage.c
similarity index 100%
rename from src/mainboard/amd/norwich/cache_as_ram_auto.c
rename to src/mainboard/amd/norwich/romstage.c
diff --git a/src/mainboard/amd/pistachio/Makefile.inc b/src/mainboard/amd/pistachio/Makefile.inc
index dda9ecf..482dfff 100644
--- a/src/mainboard/amd/pistachio/Makefile.inc
+++ b/src/mainboard/amd/pistachio/Makefile.inc
@@ -38,7 +38,7 @@
crt0s += $(src)/cpu/x86/16bit/reset16.inc
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -55,8 +55,8 @@
$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/amd/pistachio/cache_as_ram_auto.c b/src/mainboard/amd/pistachio/romstage.c
similarity index 100%
rename from src/mainboard/amd/pistachio/cache_as_ram_auto.c
rename to src/mainboard/amd/pistachio/romstage.c
diff --git a/src/mainboard/amd/rumba/auto.c b/src/mainboard/amd/rumba/romstage.c
similarity index 100%
rename from src/mainboard/amd/rumba/auto.c
rename to src/mainboard/amd/rumba/romstage.c
diff --git a/src/mainboard/amd/serengeti_cheetah/Makefile.inc b/src/mainboard/amd/serengeti_cheetah/Makefile.inc
index e6f3488..2a21650 100644
--- a/src/mainboard/amd/serengeti_cheetah/Makefile.inc
+++ b/src/mainboard/amd/serengeti_cheetah/Makefile.inc
@@ -44,7 +44,7 @@
crt0s += $(src)/cpu/x86/16bit/reset16.inc
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -76,8 +76,8 @@
perl -pi -e 's/AmlCode/AmlCode_ssdt4/g' $(obj)/pci4.hex
mv $(obj)/pci4.hex $@
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/amd/serengeti_cheetah/cache_as_ram_auto.c b/src/mainboard/amd/serengeti_cheetah/romstage.c
similarity index 100%
rename from src/mainboard/amd/serengeti_cheetah/cache_as_ram_auto.c
rename to src/mainboard/amd/serengeti_cheetah/romstage.c
diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/Makefile.inc b/src/mainboard/amd/serengeti_cheetah_fam10/Makefile.inc
index afc1da4..619e53a 100644
--- a/src/mainboard/amd/serengeti_cheetah_fam10/Makefile.inc
+++ b/src/mainboard/amd/serengeti_cheetah_fam10/Makefile.inc
@@ -43,7 +43,7 @@
# FIXME in $(top)/Makefile
crt0s := $(src)/cpu/x86/32bit/entry32.inc
crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/32bit/entry32.lds
@@ -78,8 +78,8 @@
perl -pi -e 's/AmlCode/AmlCode_ssdt5/g' $(obj)/mainboard/$(MAINBOARDDIR)/pci5.hex
mv $(obj)/mainboard/$(MAINBOARDDIR)/pci5.hex $@
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/cache_as_ram_auto.c b/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c
similarity index 100%
rename from src/mainboard/amd/serengeti_cheetah_fam10/cache_as_ram_auto.c
rename to src/mainboard/amd/serengeti_cheetah_fam10/romstage.c
diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/spd_addr.h b/src/mainboard/amd/serengeti_cheetah_fam10/spd_addr.h
index 5f246ec..c0e552a 100644
--- a/src/mainboard/amd/serengeti_cheetah_fam10/spd_addr.h
+++ b/src/mainboard/amd/serengeti_cheetah_fam10/spd_addr.h
@@ -19,7 +19,7 @@
/**
* This file defines the SPD addresses for the mainboard. Must be included in
- * cache_as_ram_auto.c
+ * romstage.c
*/
#define RC00 0
diff --git a/src/mainboard/arima/hdama/cache_as_ram_auto.c b/src/mainboard/arima/hdama/romstage.c
similarity index 100%
rename from src/mainboard/arima/hdama/cache_as_ram_auto.c
rename to src/mainboard/arima/hdama/romstage.c
diff --git a/src/mainboard/artecgroup/dbe61/Makefile.inc b/src/mainboard/artecgroup/dbe61/Makefile.inc
index 6f3a239..843cf9a 100644
--- a/src/mainboard/artecgroup/dbe61/Makefile.inc
+++ b/src/mainboard/artecgroup/dbe61/Makefile.inc
@@ -12,7 +12,7 @@
crt0s += $(src)/cpu/x86/16bit/reset16.inc
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/cpu/amd/model_lx/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -22,8 +22,8 @@
ifdef POST_EVALUATION
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/artecgroup/dbe61/cache_as_ram_auto.c b/src/mainboard/artecgroup/dbe61/romstage.c
similarity index 100%
rename from src/mainboard/artecgroup/dbe61/cache_as_ram_auto.c
rename to src/mainboard/artecgroup/dbe61/romstage.c
diff --git a/src/mainboard/asi/mb_5blgp/auto.c b/src/mainboard/asi/mb_5blgp/romstage.c
similarity index 100%
rename from src/mainboard/asi/mb_5blgp/auto.c
rename to src/mainboard/asi/mb_5blgp/romstage.c
diff --git a/src/mainboard/asi/mb_5blmp/auto.c b/src/mainboard/asi/mb_5blmp/romstage.c
similarity index 100%
rename from src/mainboard/asi/mb_5blmp/auto.c
rename to src/mainboard/asi/mb_5blmp/romstage.c
diff --git a/src/mainboard/asus/a8n_e/Makefile.inc b/src/mainboard/asus/a8n_e/Makefile.inc
index bf01576..8bcaea7 100644
--- a/src/mainboard/asus/a8n_e/Makefile.inc
+++ b/src/mainboard/asus/a8n_e/Makefile.inc
@@ -35,7 +35,7 @@
crt0s += $(src)/cpu/x86/16bit/reset16.inc
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -67,8 +67,8 @@
perl -pi -e 's/AmlCode/AmlCode_ssdt4/g' pci4.hex
mv pci4.hex ssdt4.c
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/asus/a8n_e/cache_as_ram_auto.c b/src/mainboard/asus/a8n_e/romstage.c
similarity index 100%
rename from src/mainboard/asus/a8n_e/cache_as_ram_auto.c
rename to src/mainboard/asus/a8n_e/romstage.c
diff --git a/src/mainboard/asus/a8v-e_se/Makefile.inc b/src/mainboard/asus/a8v-e_se/Makefile.inc
index 8f829ba..8900722 100644
--- a/src/mainboard/asus/a8v-e_se/Makefile.inc
+++ b/src/mainboard/asus/a8v-e_se/Makefile.inc
@@ -16,7 +16,7 @@
crt0s += $(src)/cpu/x86/16bit/reset16.inc
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -34,8 +34,8 @@
$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/asus/a8v-e_se/cache_as_ram_auto.c b/src/mainboard/asus/a8v-e_se/romstage.c
similarity index 100%
rename from src/mainboard/asus/a8v-e_se/cache_as_ram_auto.c
rename to src/mainboard/asus/a8v-e_se/romstage.c
diff --git a/src/mainboard/asus/m2v-mx_se/Makefile.inc b/src/mainboard/asus/m2v-mx_se/Makefile.inc
index 8cd9af9..d703a32 100644
--- a/src/mainboard/asus/m2v-mx_se/Makefile.inc
+++ b/src/mainboard/asus/m2v-mx_se/Makefile.inc
@@ -32,7 +32,7 @@
# FIXME in $(top)/Makefile
crt0s := $(src)/cpu/x86/32bit/entry32.inc
crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/32bit/entry32.lds
@@ -46,8 +46,8 @@
$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/asus/m2v-mx_se/cache_as_ram_auto.c b/src/mainboard/asus/m2v-mx_se/romstage.c
similarity index 100%
rename from src/mainboard/asus/m2v-mx_se/cache_as_ram_auto.c
rename to src/mainboard/asus/m2v-mx_se/romstage.c
diff --git a/src/mainboard/asus/mew-am/auto.c b/src/mainboard/asus/mew-am/romstage.c
similarity index 100%
rename from src/mainboard/asus/mew-am/auto.c
rename to src/mainboard/asus/mew-am/romstage.c
diff --git a/src/mainboard/asus/mew-vm/auto.c b/src/mainboard/asus/mew-vm/romstage.c
similarity index 100%
rename from src/mainboard/asus/mew-vm/auto.c
rename to src/mainboard/asus/mew-vm/romstage.c
diff --git a/src/mainboard/asus/p2b-d/auto.c b/src/mainboard/asus/p2b-d/romstage.c
similarity index 100%
rename from src/mainboard/asus/p2b-d/auto.c
rename to src/mainboard/asus/p2b-d/romstage.c
diff --git a/src/mainboard/asus/p2b-ds/auto.c b/src/mainboard/asus/p2b-ds/romstage.c
similarity index 100%
rename from src/mainboard/asus/p2b-ds/auto.c
rename to src/mainboard/asus/p2b-ds/romstage.c
diff --git a/src/mainboard/asus/p2b-f/auto.c b/src/mainboard/asus/p2b-f/romstage.c
similarity index 100%
rename from src/mainboard/asus/p2b-f/auto.c
rename to src/mainboard/asus/p2b-f/romstage.c
diff --git a/src/mainboard/asus/p2b/auto.c b/src/mainboard/asus/p2b/romstage.c
similarity index 100%
rename from src/mainboard/asus/p2b/auto.c
rename to src/mainboard/asus/p2b/romstage.c
diff --git a/src/mainboard/asus/p3b-f/auto.c b/src/mainboard/asus/p3b-f/romstage.c
similarity index 100%
rename from src/mainboard/asus/p3b-f/auto.c
rename to src/mainboard/asus/p3b-f/romstage.c
diff --git a/src/mainboard/axus/tc320/auto.c b/src/mainboard/axus/tc320/romstage.c
similarity index 100%
rename from src/mainboard/axus/tc320/auto.c
rename to src/mainboard/axus/tc320/romstage.c
diff --git a/src/mainboard/azza/pt-6ibd/auto.c b/src/mainboard/azza/pt-6ibd/romstage.c
similarity index 100%
rename from src/mainboard/azza/pt-6ibd/auto.c
rename to src/mainboard/azza/pt-6ibd/romstage.c
diff --git a/src/mainboard/bcom/winnet100/auto.c b/src/mainboard/bcom/winnet100/romstage.c
similarity index 100%
rename from src/mainboard/bcom/winnet100/auto.c
rename to src/mainboard/bcom/winnet100/romstage.c
diff --git a/src/mainboard/bcom/winnetp680/Makefile.inc b/src/mainboard/bcom/winnetp680/Makefile.inc
index 1db65e2..5ae10f3 100644
--- a/src/mainboard/bcom/winnetp680/Makefile.inc
+++ b/src/mainboard/bcom/winnetp680/Makefile.inc
@@ -39,7 +39,7 @@
crt0s += $(src)/cpu/x86/16bit/reset16.inc
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/cpu/x86/fpu_enable.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
crt0s += $(src)/cpu/x86/mmx_disable.inc
ifdef POST_EVALUATION
@@ -51,8 +51,8 @@
iasl -p dsdt -tc $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl
mv dsdt.hex $@
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/bcom/winnetp680/auto.c b/src/mainboard/bcom/winnetp680/romstage.c
similarity index 96%
rename from src/mainboard/bcom/winnetp680/auto.c
rename to src/mainboard/bcom/winnetp680/romstage.c
index 254b168..dd66d30 100644
--- a/src/mainboard/bcom/winnetp680/auto.c
+++ b/src/mainboard/bcom/winnetp680/romstage.c
@@ -104,7 +104,7 @@
uart_init();
console_init();
- print_spew("In auto.c:main()\r\n");
+ print_spew("In romstage.c:main()\r\n");
enable_smbus();
smbus_fixup(&ctrl);
@@ -124,5 +124,5 @@
/* ram_check(0, 640 * 1024); */
- print_spew("Leaving auto.c:main()\r\n");
+ print_spew("Leaving romstage.c:main()\r\n");
}
diff --git a/src/mainboard/biostar/m6tba/auto.c b/src/mainboard/biostar/m6tba/romstage.c
similarity index 100%
rename from src/mainboard/biostar/m6tba/auto.c
rename to src/mainboard/biostar/m6tba/romstage.c
diff --git a/src/mainboard/broadcom/blast/cache_as_ram_auto.c b/src/mainboard/broadcom/blast/romstage.c
similarity index 100%
rename from src/mainboard/broadcom/blast/cache_as_ram_auto.c
rename to src/mainboard/broadcom/blast/romstage.c
diff --git a/src/mainboard/compaq/deskpro_en_sff_p600/auto.c b/src/mainboard/compaq/deskpro_en_sff_p600/romstage.c
similarity index 100%
rename from src/mainboard/compaq/deskpro_en_sff_p600/auto.c
rename to src/mainboard/compaq/deskpro_en_sff_p600/romstage.c
diff --git a/src/mainboard/dell/s1850/auto.c b/src/mainboard/dell/s1850/romstage.c
similarity index 100%
rename from src/mainboard/dell/s1850/auto.c
rename to src/mainboard/dell/s1850/romstage.c
diff --git a/src/mainboard/digitallogic/adl855pc/auto.c b/src/mainboard/digitallogic/adl855pc/romstage.c
similarity index 100%
rename from src/mainboard/digitallogic/adl855pc/auto.c
rename to src/mainboard/digitallogic/adl855pc/romstage.c
diff --git a/src/mainboard/digitallogic/msm586seg/auto.c b/src/mainboard/digitallogic/msm586seg/romstage.c
similarity index 100%
rename from src/mainboard/digitallogic/msm586seg/auto.c
rename to src/mainboard/digitallogic/msm586seg/romstage.c
diff --git a/src/mainboard/digitallogic/msm800sev/Makefile.inc b/src/mainboard/digitallogic/msm800sev/Makefile.inc
index f101f22..0e4b263 100644
--- a/src/mainboard/digitallogic/msm800sev/Makefile.inc
+++ b/src/mainboard/digitallogic/msm800sev/Makefile.inc
@@ -12,7 +12,7 @@
crt0s += $(src)/cpu/x86/16bit/reset16.inc
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/cpu/amd/model_lx/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -22,8 +22,8 @@
ifdef POST_EVALUATION
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/build.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/build.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/digitallogic/msm800sev/auto.c b/src/mainboard/digitallogic/msm800sev/auto.c
deleted file mode 100644
index 29a5661..0000000
--- a/src/mainboard/digitallogic/msm800sev/auto.c
+++ /dev/null
@@ -1,138 +0,0 @@
-#define ASSEMBLY 1
-#define __PRE_RAM__
-
-#include <stdint.h>
-#include <device/pci_def.h>
-#include <arch/io.h>
-#include <device/pnp_def.h>
-#include <arch/romcc_io.h>
-#include <arch/hlt.h>
-#include "pc80/serial.c"
-#include "arch/i386/lib/console.c"
-#include "lib/ramtest.c"
-//#include "superio/winbond/w83627hf/w83627hf_early_serial.c"
-#include "cpu/x86/bist.h"
-#include "cpu/x86/msr.h"
-#include <cpu/amd/lxdef.h>
-
-//#define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
-
-#include "southbridge/amd/cs5536/cs5536_early_smbus.c"
-#include "southbridge/amd/cs5536/cs5536_early_setup.c"
-
-static inline int spd_read_byte(unsigned device, unsigned address)
-{
- return smbus_read_byte(device, address);
-}
-
-#include "northbridge/amd/lx/raminit.h"
-
-static inline unsigned int fls(unsigned int x)
-{
- int r;
-
- __asm__("bsfl %1,%0\n\t"
- "jnz 1f\n\t"
- "movl $32,%0\n"
- "1:" : "=r" (r) : "g" (x));
- return r;
-}
-
-
-
-static void sdram_set_spd_registers(const struct mem_controller *ctrl)
-{
- /* Total size of DIMM = 2^row address (byte 3) * 2^col address (byte 4) *
- * component Banks (byte 17) * module banks, side (byte 5) *
- * width in bits (byte 6,7)
- * = Density per side (byte 31) * number of sides (byte 5) */
- /* 1. Initialize GLMC registers base on SPD values, do one DIMM for now */
- msr_t msr;
- unsigned char module_banks, val;
-
-
- msr.hi = 0x10075012;
- msr.lo = 0x00000040;
-
- wrmsr(MC_CF07_DATA, msr); //GX3
-
- /* timing and mode ... */
-
- //msr = rdmsr(0x20000019);
-
- /* per standard bios settings */
-/*
- msr.hi = 0x18000108;
- msr.lo =
- (6<<28) | // cas_lat
- (10<<24)| // ref2act
- (7<<20)| // act2pre
- (3<<16)| // pre2act
- (3<<12)| // act2cmd
- (2<<8)| // act2act
- (2<<6)| // dplwr
- (2<<4)| // dplrd
- (3); // dal
- * the msr value reported by quanta is very, very different.
- * we will go with that value for now.
- *
- //msr.lo = 0x286332a3;
-*/
- //wrmsr(0x20000019, msr); //GX3
-
-}
-
-#include "northbridge/amd/lx/raminit.c"
-#include "lib/generic_sdram.c"
-
-/* CPU and GLIU mult/div */
-#define PLLMSRhi 0x0000039C
-/* Hold Count - how long we will sit in reset */
-#define PLLMSRlo 0x00DE0000
-
-#include "northbridge/amd/lx/pll_reset.c"
-#include "cpu/amd/model_lx/cpureginit.c"
-#include "cpu/amd/model_lx/syspreinit.c"
-static void msr_init(void)
-{
-
- __builtin_wrmsr(0x10000020, 0xfff80, 0x20000000);
- __builtin_wrmsr(0x10000021, 0x80fffe0, 0x20000000);
-
- __builtin_wrmsr(0x40000020, 0xfff80, 0x20000000);
- __builtin_wrmsr(0x40000021, 0x80fffe0, 0x20000000);
-}
-
-
-static void main(unsigned long bist)
-{
- static const struct mem_controller memctrl [] = {
- {.channel0 = {(0xa<<3)|0, (0xa<<3)|1}}
- };
-
- SystemPreInit(); //GX3 OK
-
- msr_init(); //GX3 OK
-
- cs5536_early_setup(); //GX3 OK
-
- /* NOTE: must do this AFTER the early_setup!
- * it is counting on some early MSR setup
- * for cs5536
- */
- cs5536_setup_onchipuart(); //GX3 OK
-
- uart_init(); //GX3 OK
- console_init(); //GX3 OK
-
- pll_reset(); //GX3 OK
-
- cpuRegInit(); //GX3 OK
-
- print_err("done cpuRegInit\n");
-
- sdram_initialize(1, memctrl); //GX3 OK almost
-
- /* Check all of memory */
- //ram_check(0x00000000, 640*1024);
-}
diff --git a/src/mainboard/digitallogic/msm800sev/cache_as_ram_auto.c b/src/mainboard/digitallogic/msm800sev/romstage.c
similarity index 96%
rename from src/mainboard/digitallogic/msm800sev/cache_as_ram_auto.c
rename to src/mainboard/digitallogic/msm800sev/romstage.c
index 70fa935..03f9fae 100644
--- a/src/mainboard/digitallogic/msm800sev/cache_as_ram_auto.c
+++ b/src/mainboard/digitallogic/msm800sev/romstage.c
@@ -98,7 +98,7 @@
/* Switch from Cache as RAM to real RAM */
/* There are two ways we could think about this.
- 1. If we are using the auto.inc ROMCC way, the stack is going to be re-setup in the code following this code.
+ 1. If we are using the romstage.inc ROMCC way, the stack is going to be re-setup in the code following this code.
Just wbinvd the stack to clear the cache tags. We don't care where the stack used to be.
2. This file is built as a normal .c -> .o and linked in etc. The stack might be used to return etc.
That means we care about what is in the stack. If we are smart we set the CAR stack to the same location
diff --git a/src/mainboard/eaglelion/5bcm/auto.c b/src/mainboard/eaglelion/5bcm/romstage.c
similarity index 100%
rename from src/mainboard/eaglelion/5bcm/auto.c
rename to src/mainboard/eaglelion/5bcm/romstage.c
diff --git a/src/mainboard/emulation/qemu-x86/auto.c b/src/mainboard/emulation/qemu-x86/romstage.c
similarity index 100%
rename from src/mainboard/emulation/qemu-x86/auto.c
rename to src/mainboard/emulation/qemu-x86/romstage.c
diff --git a/src/mainboard/gigabyte/ga-6bxc/auto.c b/src/mainboard/gigabyte/ga-6bxc/romstage.c
similarity index 100%
rename from src/mainboard/gigabyte/ga-6bxc/auto.c
rename to src/mainboard/gigabyte/ga-6bxc/romstage.c
diff --git a/src/mainboard/gigabyte/ga_2761gxdk/Makefile.inc b/src/mainboard/gigabyte/ga_2761gxdk/Makefile.inc
index c6355e6..5baea40 100644
--- a/src/mainboard/gigabyte/ga_2761gxdk/Makefile.inc
+++ b/src/mainboard/gigabyte/ga_2761gxdk/Makefile.inc
@@ -25,7 +25,7 @@
obj-y += get_bus_conf.o
obj-$(CONFIG_GENERATE_MP_TABLE) += mptable.o
obj-$(CONFIG_GENERATE_PIRQ_TABLE) += irq_tables.o
-obj-$(CONFIG_USE_INIT) += cache_as_ram_auto.o
+obj-$(CONFIG_USE_INIT) += romstage.o
obj-$(CONFIG_AP_CODE_IN_CAR) += apc_auto.o
# This is part of the conversion to init-obj and away from included code.
@@ -35,7 +35,7 @@
crt0s += $(src)/cpu/x86/16bit/reset16.inc
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -48,11 +48,11 @@
ifdef POST_EVALUATION
-$(obj)/mainboard/$(MAINBOARDDIR)/apc_auto.o: $(src)/mainboard/$(MAINBOARDDIR)/apc_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/apc_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/apc_auto.o: $(src)/mainboard/$(MAINBOARDDIR)/apc_romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/apc_romstage.c -o $@
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/gigabyte/ga_2761gxdk/cache_as_ram_auto.c b/src/mainboard/gigabyte/ga_2761gxdk/romstage.c
similarity index 100%
rename from src/mainboard/gigabyte/ga_2761gxdk/cache_as_ram_auto.c
rename to src/mainboard/gigabyte/ga_2761gxdk/romstage.c
diff --git a/src/mainboard/gigabyte/m57sli/Makefile.inc b/src/mainboard/gigabyte/m57sli/Makefile.inc
index 5aad212..0fb2cac 100644
--- a/src/mainboard/gigabyte/m57sli/Makefile.inc
+++ b/src/mainboard/gigabyte/m57sli/Makefile.inc
@@ -25,7 +25,7 @@
obj-y += get_bus_conf.o
obj-$(CONFIG_GENERATE_MP_TABLE) += mptable.o
obj-$(CONFIG_GENERATE_PIRQ_TABLE) += irq_tables.o
-obj-$(CONFIG_USE_INIT) += cache_as_ram_auto.o
+obj-$(CONFIG_USE_INIT) += romstage.o
obj-$(CONFIG_AP_CODE_IN_CAR) += apc_auto.o
obj-$(CONFIG_GENERATE_ACPI_TABLES) += dsdt.o
obj-$(CONFIG_GENERATE_ACPI_TABLES) += acpi_tables.o
@@ -39,7 +39,7 @@
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/southbridge/nvidia/mcp55/romstrap.inc
crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -60,11 +60,11 @@
$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
-$(obj)/mainboard/$(MAINBOARDDIR)/apc_auto.o: $(src)/mainboard/$(MAINBOARDDIR)/apc_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/apc_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/apc_auto.o: $(src)/mainboard/$(MAINBOARDDIR)/apc_romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/apc_romstage.c -o $@
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/gigabyte/m57sli/cache_as_ram_auto.c b/src/mainboard/gigabyte/m57sli/romstage.c
similarity index 100%
rename from src/mainboard/gigabyte/m57sli/cache_as_ram_auto.c
rename to src/mainboard/gigabyte/m57sli/romstage.c
diff --git a/src/mainboard/hp/dl145_g3/cache_as_ram_auto.c b/src/mainboard/hp/dl145_g3/romstage.c
similarity index 100%
rename from src/mainboard/hp/dl145_g3/cache_as_ram_auto.c
rename to src/mainboard/hp/dl145_g3/romstage.c
diff --git a/src/mainboard/hp/e_vectra_p2706t/auto.c b/src/mainboard/hp/e_vectra_p2706t/romstage.c
similarity index 100%
rename from src/mainboard/hp/e_vectra_p2706t/auto.c
rename to src/mainboard/hp/e_vectra_p2706t/romstage.c
diff --git a/src/mainboard/ibm/e325/cache_as_ram_auto.c b/src/mainboard/ibm/e325/romstage.c
similarity index 100%
rename from src/mainboard/ibm/e325/cache_as_ram_auto.c
rename to src/mainboard/ibm/e325/romstage.c
diff --git a/src/mainboard/ibm/e326/cache_as_ram_auto.c b/src/mainboard/ibm/e326/romstage.c
similarity index 100%
rename from src/mainboard/ibm/e326/cache_as_ram_auto.c
rename to src/mainboard/ibm/e326/romstage.c
diff --git a/src/mainboard/iei/juki-511p/auto.c b/src/mainboard/iei/juki-511p/romstage.c
similarity index 100%
rename from src/mainboard/iei/juki-511p/auto.c
rename to src/mainboard/iei/juki-511p/romstage.c
diff --git a/src/mainboard/iei/nova4899r/auto.c b/src/mainboard/iei/nova4899r/romstage.c
similarity index 100%
rename from src/mainboard/iei/nova4899r/auto.c
rename to src/mainboard/iei/nova4899r/romstage.c
diff --git a/src/mainboard/iei/pcisa-lx-800-r10/Makefile.inc b/src/mainboard/iei/pcisa-lx-800-r10/Makefile.inc
index f101f22..0e4b263 100644
--- a/src/mainboard/iei/pcisa-lx-800-r10/Makefile.inc
+++ b/src/mainboard/iei/pcisa-lx-800-r10/Makefile.inc
@@ -12,7 +12,7 @@
crt0s += $(src)/cpu/x86/16bit/reset16.inc
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/cpu/amd/model_lx/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -22,8 +22,8 @@
ifdef POST_EVALUATION
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/build.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/build.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/iei/pcisa-lx-800-r10/cache_as_ram_auto.c b/src/mainboard/iei/pcisa-lx-800-r10/romstage.c
similarity index 100%
rename from src/mainboard/iei/pcisa-lx-800-r10/cache_as_ram_auto.c
rename to src/mainboard/iei/pcisa-lx-800-r10/romstage.c
diff --git a/src/mainboard/intel/d945gclf/Makefile.inc b/src/mainboard/intel/d945gclf/Makefile.inc
index 83e8f5c..944aa3d 100644
--- a/src/mainboard/intel/d945gclf/Makefile.inc
+++ b/src/mainboard/intel/d945gclf/Makefile.inc
@@ -41,7 +41,7 @@
crt0s += $(src)/cpu/x86/16bit/reset16.inc
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/cpu/intel/model_6ex/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -59,8 +59,8 @@
$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/intel/d945gclf/auto.c b/src/mainboard/intel/d945gclf/romstage.c
similarity index 100%
rename from src/mainboard/intel/d945gclf/auto.c
rename to src/mainboard/intel/d945gclf/romstage.c
diff --git a/src/mainboard/intel/eagleheights/Makefile.inc b/src/mainboard/intel/eagleheights/Makefile.inc
index 6466932..af1b217 100644
--- a/src/mainboard/intel/eagleheights/Makefile.inc
+++ b/src/mainboard/intel/eagleheights/Makefile.inc
@@ -16,7 +16,7 @@
crt0s += $(src)/arch/i386/lib/id.inc
# Use Intel Core (not Core 2) code for CAR init, any CPU might be used.
crt0s += $(src)/cpu/intel/model_6ex/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -33,8 +33,8 @@
$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/mainboard/$(MAINBOARDDIR)/dsdt.c
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/intel/eagleheights/auto.c b/src/mainboard/intel/eagleheights/romstage.c
similarity index 100%
rename from src/mainboard/intel/eagleheights/auto.c
rename to src/mainboard/intel/eagleheights/romstage.c
diff --git a/src/mainboard/intel/jarrell/auto.c b/src/mainboard/intel/jarrell/romstage.c
similarity index 100%
rename from src/mainboard/intel/jarrell/auto.c
rename to src/mainboard/intel/jarrell/romstage.c
diff --git a/src/mainboard/intel/mtarvon/auto.c b/src/mainboard/intel/mtarvon/romstage.c
similarity index 100%
rename from src/mainboard/intel/mtarvon/auto.c
rename to src/mainboard/intel/mtarvon/romstage.c
diff --git a/src/mainboard/intel/truxton/auto.c b/src/mainboard/intel/truxton/romstage.c
similarity index 100%
rename from src/mainboard/intel/truxton/auto.c
rename to src/mainboard/intel/truxton/romstage.c
diff --git a/src/mainboard/intel/xe7501devkit/auto.c b/src/mainboard/intel/xe7501devkit/romstage.c
similarity index 100%
rename from src/mainboard/intel/xe7501devkit/auto.c
rename to src/mainboard/intel/xe7501devkit/romstage.c
diff --git a/src/mainboard/iwill/dk8_htx/Makefile.inc b/src/mainboard/iwill/dk8_htx/Makefile.inc
index 1b991e8..95af100 100644
--- a/src/mainboard/iwill/dk8_htx/Makefile.inc
+++ b/src/mainboard/iwill/dk8_htx/Makefile.inc
@@ -44,7 +44,7 @@
crt0s += $(src)/cpu/x86/16bit/reset16.inc
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -81,8 +81,8 @@
perl -pi -e 's/AmlCode/AmlCode_ssdt5/g' $(obj)/pci5.hex
mv $(obj)/pci5.hex $@
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/iwill/dk8_htx/cache_as_ram_auto.c b/src/mainboard/iwill/dk8_htx/romstage.c
similarity index 100%
rename from src/mainboard/iwill/dk8_htx/cache_as_ram_auto.c
rename to src/mainboard/iwill/dk8_htx/romstage.c
diff --git a/src/mainboard/iwill/dk8s2/cache_as_ram_auto.c b/src/mainboard/iwill/dk8s2/romstage.c
similarity index 100%
rename from src/mainboard/iwill/dk8s2/cache_as_ram_auto.c
rename to src/mainboard/iwill/dk8s2/romstage.c
diff --git a/src/mainboard/iwill/dk8x/cache_as_ram_auto.c b/src/mainboard/iwill/dk8x/romstage.c
similarity index 100%
rename from src/mainboard/iwill/dk8x/cache_as_ram_auto.c
rename to src/mainboard/iwill/dk8x/romstage.c
diff --git a/src/mainboard/jetway/j7f24/Makefile.inc b/src/mainboard/jetway/j7f24/Makefile.inc
index 2843b73..47e519a 100644
--- a/src/mainboard/jetway/j7f24/Makefile.inc
+++ b/src/mainboard/jetway/j7f24/Makefile.inc
@@ -35,13 +35,13 @@
crt0s += $(src)/cpu/x86/16bit/reset16.inc
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/cpu/x86/fpu_enable.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
crt0s += $(src)/cpu/x86/mmx_disable.inc
ifdef POST_EVALUATION
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/jetway/j7f24/auto.c b/src/mainboard/jetway/j7f24/romstage.c
similarity index 96%
rename from src/mainboard/jetway/j7f24/auto.c
rename to src/mainboard/jetway/j7f24/romstage.c
index 050b40e..82a90db 100644
--- a/src/mainboard/jetway/j7f24/auto.c
+++ b/src/mainboard/jetway/j7f24/romstage.c
@@ -106,7 +106,7 @@
uart_init();
console_init();
- print_spew("In auto.c:main()\r\n");
+ print_spew("In romstage.c:main()\r\n");
enable_smbus();
smbus_fixup(&ctrl);
@@ -126,5 +126,5 @@
/* ram_check(0, 640 * 1024); */
- print_spew("Leaving auto.c:main()\r\n");
+ print_spew("Leaving romstage.c:main()\r\n");
}
diff --git a/src/mainboard/kontron/986lcd-m/Makefile.inc b/src/mainboard/kontron/986lcd-m/Makefile.inc
index bd0d7b9..29f4379 100644
--- a/src/mainboard/kontron/986lcd-m/Makefile.inc
+++ b/src/mainboard/kontron/986lcd-m/Makefile.inc
@@ -40,7 +40,7 @@
crt0s := $(src)/cpu/x86/32bit/entry32.inc
crt0s += $(src)/cpu/intel/model_6ex/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/32bit/entry32.lds
@@ -55,8 +55,8 @@
$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/kontron/986lcd-m/auto.c b/src/mainboard/kontron/986lcd-m/romstage.c
similarity index 99%
rename from src/mainboard/kontron/986lcd-m/auto.c
rename to src/mainboard/kontron/986lcd-m/romstage.c
index 29d1d24..e0943ab 100644
--- a/src/mainboard/kontron/986lcd-m/auto.c
+++ b/src/mainboard/kontron/986lcd-m/romstage.c
@@ -29,7 +29,7 @@
* However, the Kontron 986LCD-M does not like unused clock signals to
* be disabled. If other similar mainboard occur, it would make sense
* to make this an entry in the sysinfo structure, and pre-initialize that
- * structure in the mainboard's auto.c main() function. For now a
+ * structure in the mainboard's romstage.c main() function. For now a
* #define will do.
*/
#define OVERRIDE_CLOCK_DISABLE 1
diff --git a/src/mainboard/kontron/kt690/Makefile.inc b/src/mainboard/kontron/kt690/Makefile.inc
index dda9ecf..482dfff 100644
--- a/src/mainboard/kontron/kt690/Makefile.inc
+++ b/src/mainboard/kontron/kt690/Makefile.inc
@@ -38,7 +38,7 @@
crt0s += $(src)/cpu/x86/16bit/reset16.inc
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -55,8 +55,8 @@
$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/kontron/kt690/cache_as_ram_auto.c b/src/mainboard/kontron/kt690/romstage.c
similarity index 100%
rename from src/mainboard/kontron/kt690/cache_as_ram_auto.c
rename to src/mainboard/kontron/kt690/romstage.c
diff --git a/src/mainboard/lippert/frontrunner/auto.c b/src/mainboard/lippert/frontrunner/romstage.c
similarity index 100%
rename from src/mainboard/lippert/frontrunner/auto.c
rename to src/mainboard/lippert/frontrunner/romstage.c
diff --git a/src/mainboard/lippert/roadrunner-lx/Makefile.inc b/src/mainboard/lippert/roadrunner-lx/Makefile.inc
index f101f22..0e4b263 100644
--- a/src/mainboard/lippert/roadrunner-lx/Makefile.inc
+++ b/src/mainboard/lippert/roadrunner-lx/Makefile.inc
@@ -12,7 +12,7 @@
crt0s += $(src)/cpu/x86/16bit/reset16.inc
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/cpu/amd/model_lx/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -22,8 +22,8 @@
ifdef POST_EVALUATION
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/build.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/build.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/lippert/roadrunner-lx/cache_as_ram_auto.c b/src/mainboard/lippert/roadrunner-lx/romstage.c
similarity index 97%
rename from src/mainboard/lippert/roadrunner-lx/cache_as_ram_auto.c
rename to src/mainboard/lippert/roadrunner-lx/romstage.c
index 3884a27..e8cfee5 100644
--- a/src/mainboard/lippert/roadrunner-lx/cache_as_ram_auto.c
+++ b/src/mainboard/lippert/roadrunner-lx/romstage.c
@@ -19,7 +19,7 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-/* Based on cache_as_ram_auto.c from AMD's DB800 and DBM690T mainboards. */
+/* Based on romstage.c from AMD's DB800 and DBM690T mainboards. */
#define ASSEMBLY 1
#define __PRE_RAM__
diff --git a/src/mainboard/lippert/spacerunner-lx/Makefile.inc b/src/mainboard/lippert/spacerunner-lx/Makefile.inc
index f101f22..0e4b263 100644
--- a/src/mainboard/lippert/spacerunner-lx/Makefile.inc
+++ b/src/mainboard/lippert/spacerunner-lx/Makefile.inc
@@ -12,7 +12,7 @@
crt0s += $(src)/cpu/x86/16bit/reset16.inc
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/cpu/amd/model_lx/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -22,8 +22,8 @@
ifdef POST_EVALUATION
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/build.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/build.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/lippert/spacerunner-lx/cache_as_ram_auto.c b/src/mainboard/lippert/spacerunner-lx/romstage.c
similarity index 98%
rename from src/mainboard/lippert/spacerunner-lx/cache_as_ram_auto.c
rename to src/mainboard/lippert/spacerunner-lx/romstage.c
index 9aeeb63..54d7113 100644
--- a/src/mainboard/lippert/spacerunner-lx/cache_as_ram_auto.c
+++ b/src/mainboard/lippert/spacerunner-lx/romstage.c
@@ -19,7 +19,7 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-/* Based on cache_as_ram_auto.c from AMD's DB800 and DBM690T mainboards. */
+/* Based on romstage.c from AMD's DB800 and DBM690T mainboards. */
#define ASSEMBLY 1
#define __PRE_RAM__
diff --git a/src/mainboard/mitac/6513wu/auto.c b/src/mainboard/mitac/6513wu/romstage.c
similarity index 100%
rename from src/mainboard/mitac/6513wu/auto.c
rename to src/mainboard/mitac/6513wu/romstage.c
diff --git a/src/mainboard/msi/ms6119/auto.c b/src/mainboard/msi/ms6119/romstage.c
similarity index 100%
rename from src/mainboard/msi/ms6119/auto.c
rename to src/mainboard/msi/ms6119/romstage.c
diff --git a/src/mainboard/msi/ms6147/auto.c b/src/mainboard/msi/ms6147/romstage.c
similarity index 100%
rename from src/mainboard/msi/ms6147/auto.c
rename to src/mainboard/msi/ms6147/romstage.c
diff --git a/src/mainboard/msi/ms6156/auto.c b/src/mainboard/msi/ms6156/romstage.c
similarity index 100%
rename from src/mainboard/msi/ms6156/auto.c
rename to src/mainboard/msi/ms6156/romstage.c
diff --git a/src/mainboard/msi/ms6178/auto.c b/src/mainboard/msi/ms6178/romstage.c
similarity index 100%
rename from src/mainboard/msi/ms6178/auto.c
rename to src/mainboard/msi/ms6178/romstage.c
diff --git a/src/mainboard/msi/ms7135/cache_as_ram_auto.c b/src/mainboard/msi/ms7135/romstage.c
similarity index 100%
rename from src/mainboard/msi/ms7135/cache_as_ram_auto.c
rename to src/mainboard/msi/ms7135/romstage.c
diff --git a/src/mainboard/msi/ms7260/Makefile.inc b/src/mainboard/msi/ms7260/Makefile.inc
index 6fec80a..fa88bc0 100644
--- a/src/mainboard/msi/ms7260/Makefile.inc
+++ b/src/mainboard/msi/ms7260/Makefile.inc
@@ -25,7 +25,7 @@
obj-y += get_bus_conf.o
obj-$(CONFIG_GENERATE_MP_TABLE) += mptable.o
obj-$(CONFIG_GENERATE_PIRQ_TABLE) += irq_tables.o
-obj-$(CONFIG_USE_INIT) += cache_as_ram_auto.o
+obj-$(CONFIG_USE_INIT) += romstage.o
obj-$(CONFIG_AP_CODE_IN_CAR) += apc_auto.o
# This is part of the conversion to init-obj and away from included code.
@@ -35,7 +35,7 @@
crt0s += $(src)/cpu/x86/16bit/reset16.inc
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -55,11 +55,11 @@
$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
-$(obj)/mainboard/$(MAINBOARDDIR)/apc_auto.o: $(src)/mainboard/$(MAINBOARDDIR)/apc_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/apc_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/apc_auto.o: $(src)/mainboard/$(MAINBOARDDIR)/apc_romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/apc_romstage.c -o $@
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/msi/ms7260/cache_as_ram_auto.c b/src/mainboard/msi/ms7260/romstage.c
similarity index 100%
rename from src/mainboard/msi/ms7260/cache_as_ram_auto.c
rename to src/mainboard/msi/ms7260/romstage.c
diff --git a/src/mainboard/msi/ms9185/cache_as_ram_auto.c b/src/mainboard/msi/ms9185/romstage.c
similarity index 100%
rename from src/mainboard/msi/ms9185/cache_as_ram_auto.c
rename to src/mainboard/msi/ms9185/romstage.c
diff --git a/src/mainboard/msi/ms9282/Makefile.inc b/src/mainboard/msi/ms9282/Makefile.inc
index 9bffee7..e46f012 100644
--- a/src/mainboard/msi/ms9282/Makefile.inc
+++ b/src/mainboard/msi/ms9282/Makefile.inc
@@ -27,7 +27,7 @@
obj-y += get_bus_conf.o
obj-$(CONFIG_GENERATE_MP_TABLE) += mptable.o
obj-$(CONFIG_GENERATE_PIRQ_TABLE) += irq_tables.o
-obj-$(CONFIG_USE_INIT) += cache_as_ram_auto.o
+obj-$(CONFIG_USE_INIT) += romstage.o
obj-$(CONFIG_AP_CODE_IN_CAR) += apc_auto.o
# This is part of the conversion to init-obj and away from included code.
@@ -37,7 +37,7 @@
crt0s += $(src)/cpu/x86/16bit/reset16.inc
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -57,11 +57,11 @@
$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
-$(obj)/mainboard/$(MAINBOARDDIR)/apc_auto.o: $(src)/mainboard/$(MAINBOARDDIR)/apc_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/apc_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/apc_auto.o: $(src)/mainboard/$(MAINBOARDDIR)/apc_romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/apc_romstage.c -o $@
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/msi/ms9282/cache_as_ram_auto.c b/src/mainboard/msi/ms9282/romstage.c
similarity index 100%
rename from src/mainboard/msi/ms9282/cache_as_ram_auto.c
rename to src/mainboard/msi/ms9282/romstage.c
diff --git a/src/mainboard/nec/powermate2000/auto.c b/src/mainboard/nec/powermate2000/romstage.c
similarity index 100%
rename from src/mainboard/nec/powermate2000/auto.c
rename to src/mainboard/nec/powermate2000/romstage.c
diff --git a/src/mainboard/newisys/khepri/cache_as_ram_auto.c b/src/mainboard/newisys/khepri/romstage.c
similarity index 98%
rename from src/mainboard/newisys/khepri/cache_as_ram_auto.c
rename to src/mainboard/newisys/khepri/romstage.c
index efd2ea3..e4c52d0 100644
--- a/src/mainboard/newisys/khepri/cache_as_ram_auto.c
+++ b/src/mainboard/newisys/khepri/romstage.c
@@ -1,5 +1,5 @@
/*
- * This code is derived from the Tyan s2882 cache_as_ram_auto.c
+ * This code is derived from the Tyan s2882 romstage.c
* Adapted by Stefan Reinauer <stepan@coresystems.de>
* Additional (C) 2007 coresystems GmbH
*/
diff --git a/src/mainboard/nvidia/l1_2pvv/Makefile.inc b/src/mainboard/nvidia/l1_2pvv/Makefile.inc
index 7ca325a..dec2de5 100644
--- a/src/mainboard/nvidia/l1_2pvv/Makefile.inc
+++ b/src/mainboard/nvidia/l1_2pvv/Makefile.inc
@@ -25,7 +25,7 @@
obj-y += get_bus_conf.o
obj-$(CONFIG_GENERATE_MP_TABLE) += mptable.o
obj-$(CONFIG_GENERATE_PIRQ_TABLE) += irq_tables.o
-obj-$(CONFIG_USE_INIT) += cache_as_ram_auto.o
+obj-$(CONFIG_USE_INIT) += romstage.o
obj-$(CONFIG_AP_CODE_IN_CAR) += apc_auto.o
# This is part of the conversion to init-obj and away from included code.
@@ -36,7 +36,7 @@
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/southbridge/nvidia/mcp55/romstrap.inc
crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -50,11 +50,11 @@
ifdef POST_EVALUATION
-$(obj)/mainboard/$(MAINBOARDDIR)/apc_auto.o: $(src)/mainboard/$(MAINBOARDDIR)/apc_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/apc_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/apc_auto.o: $(src)/mainboard/$(MAINBOARDDIR)/apc_romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/apc_romstage.c -o $@
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/nvidia/l1_2pvv/cache_as_ram_auto.c b/src/mainboard/nvidia/l1_2pvv/romstage.c
similarity index 100%
rename from src/mainboard/nvidia/l1_2pvv/cache_as_ram_auto.c
rename to src/mainboard/nvidia/l1_2pvv/romstage.c
diff --git a/src/mainboard/olpc/btest/auto.c b/src/mainboard/olpc/btest/romstage.c
similarity index 100%
rename from src/mainboard/olpc/btest/auto.c
rename to src/mainboard/olpc/btest/romstage.c
diff --git a/src/mainboard/olpc/rev_a/auto.c b/src/mainboard/olpc/rev_a/romstage.c
similarity index 100%
rename from src/mainboard/olpc/rev_a/auto.c
rename to src/mainboard/olpc/rev_a/romstage.c
diff --git a/src/mainboard/pcengines/alix1c/Makefile.inc b/src/mainboard/pcengines/alix1c/Makefile.inc
index 6f3a239..843cf9a 100644
--- a/src/mainboard/pcengines/alix1c/Makefile.inc
+++ b/src/mainboard/pcengines/alix1c/Makefile.inc
@@ -12,7 +12,7 @@
crt0s += $(src)/cpu/x86/16bit/reset16.inc
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/cpu/amd/model_lx/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -22,8 +22,8 @@
ifdef POST_EVALUATION
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/pcengines/alix1c/cache_as_ram_auto.c b/src/mainboard/pcengines/alix1c/romstage.c
similarity index 98%
rename from src/mainboard/pcengines/alix1c/cache_as_ram_auto.c
rename to src/mainboard/pcengines/alix1c/romstage.c
index e482815..321426b 100644
--- a/src/mainboard/pcengines/alix1c/cache_as_ram_auto.c
+++ b/src/mainboard/pcengines/alix1c/romstage.c
@@ -181,7 +181,7 @@
*
* There are two ways we could think about this.
*
- * 1. If we are using the auto.inc ROMCC way, the stack is
+ * 1. If we are using the romstage.inc ROMCC way, the stack is
* going to be re-setup in the code following this code. Just
* wbinvd the stack to clear the cache tags. We don't care
* where the stack used to be.
diff --git a/src/mainboard/rca/rm4100/auto.c b/src/mainboard/rca/rm4100/romstage.c
similarity index 100%
rename from src/mainboard/rca/rm4100/auto.c
rename to src/mainboard/rca/rm4100/romstage.c
diff --git a/src/mainboard/roda/rk886ex/Makefile.inc b/src/mainboard/roda/rk886ex/Makefile.inc
index 41e5780..c943ae4 100644
--- a/src/mainboard/roda/rk886ex/Makefile.inc
+++ b/src/mainboard/roda/rk886ex/Makefile.inc
@@ -45,7 +45,7 @@
crt0s += $(src)/cpu/x86/16bit/reset16.inc
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/cpu/intel/model_6ex/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -63,8 +63,8 @@
$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/roda/rk886ex/auto.c b/src/mainboard/roda/rk886ex/romstage.c
similarity index 100%
rename from src/mainboard/roda/rk886ex/auto.c
rename to src/mainboard/roda/rk886ex/romstage.c
diff --git a/src/mainboard/soyo/sy-6ba-plus-iii/auto.c b/src/mainboard/soyo/sy-6ba-plus-iii/romstage.c
similarity index 100%
rename from src/mainboard/soyo/sy-6ba-plus-iii/auto.c
rename to src/mainboard/soyo/sy-6ba-plus-iii/romstage.c
diff --git a/src/mainboard/sunw/ultra40/cache_as_ram_auto.c b/src/mainboard/sunw/ultra40/romstage.c
similarity index 100%
rename from src/mainboard/sunw/ultra40/cache_as_ram_auto.c
rename to src/mainboard/sunw/ultra40/romstage.c
diff --git a/src/mainboard/supermicro/h8dme/Makefile.inc b/src/mainboard/supermicro/h8dme/Makefile.inc
index b878c05..2d87c43 100644
--- a/src/mainboard/supermicro/h8dme/Makefile.inc
+++ b/src/mainboard/supermicro/h8dme/Makefile.inc
@@ -37,7 +37,7 @@
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/southbridge/nvidia/mcp55/romstrap.inc
crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -70,8 +70,8 @@
perl -pi -e 's/AmlCode/AmlCode_ssdt4/g' pci4.hex
mv pci4.hex ssdt4.c
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/supermicro/h8dme/cache_as_ram_auto.c b/src/mainboard/supermicro/h8dme/romstage.c
similarity index 100%
rename from src/mainboard/supermicro/h8dme/cache_as_ram_auto.c
rename to src/mainboard/supermicro/h8dme/romstage.c
diff --git a/src/mainboard/supermicro/h8dmr/Makefile.inc b/src/mainboard/supermicro/h8dmr/Makefile.inc
index 7e8949c..d280d6b 100644
--- a/src/mainboard/supermicro/h8dmr/Makefile.inc
+++ b/src/mainboard/supermicro/h8dmr/Makefile.inc
@@ -36,7 +36,7 @@
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/southbridge/nvidia/mcp55/romstrap.inc
crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -69,8 +69,8 @@
perl -pi -e 's/AmlCode/AmlCode_ssdt4/g' pci4.hex
mv pci4.hex ssdt4.c
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/supermicro/h8dmr/cache_as_ram_auto.c b/src/mainboard/supermicro/h8dmr/romstage.c
similarity index 100%
rename from src/mainboard/supermicro/h8dmr/cache_as_ram_auto.c
rename to src/mainboard/supermicro/h8dmr/romstage.c
diff --git a/src/mainboard/supermicro/h8dmr_fam10/Makefile.inc b/src/mainboard/supermicro/h8dmr_fam10/Makefile.inc
index d1e0ef6..9d1b771 100644
--- a/src/mainboard/supermicro/h8dmr_fam10/Makefile.inc
+++ b/src/mainboard/supermicro/h8dmr_fam10/Makefile.inc
@@ -32,7 +32,7 @@
# FIXME in $(top)/Makefile
crt0s := $(src)/cpu/x86/32bit/entry32.inc
crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/32bit/entry32.lds
@@ -62,8 +62,8 @@
perl -pi -e 's/AmlCode/AmlCode_ssdt4/g' $(obj)/pci4.hex
mv $(obj)/pci4.hex $(obj)/ssdt4.c
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/supermicro/h8dmr_fam10/cache_as_ram_auto.c b/src/mainboard/supermicro/h8dmr_fam10/romstage.c
similarity index 100%
rename from src/mainboard/supermicro/h8dmr_fam10/cache_as_ram_auto.c
rename to src/mainboard/supermicro/h8dmr_fam10/romstage.c
diff --git a/src/mainboard/supermicro/h8dmr_fam10/spd_addr.h b/src/mainboard/supermicro/h8dmr_fam10/spd_addr.h
index 915ee8b..a8abf33 100644
--- a/src/mainboard/supermicro/h8dmr_fam10/spd_addr.h
+++ b/src/mainboard/supermicro/h8dmr_fam10/spd_addr.h
@@ -19,7 +19,7 @@
/**
* This file defines the SPD addresses for the mainboard. Must be included in
- * cache_as_ram_auto.c
+ * romstage.c
*/
#define RC00 0
diff --git a/src/mainboard/supermicro/h8qme_fam10/Makefile.inc b/src/mainboard/supermicro/h8qme_fam10/Makefile.inc
index d1e0ef6..9d1b771 100644
--- a/src/mainboard/supermicro/h8qme_fam10/Makefile.inc
+++ b/src/mainboard/supermicro/h8qme_fam10/Makefile.inc
@@ -32,7 +32,7 @@
# FIXME in $(top)/Makefile
crt0s := $(src)/cpu/x86/32bit/entry32.inc
crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/32bit/entry32.lds
@@ -62,8 +62,8 @@
perl -pi -e 's/AmlCode/AmlCode_ssdt4/g' $(obj)/pci4.hex
mv $(obj)/pci4.hex $(obj)/ssdt4.c
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/supermicro/h8qme_fam10/cache_as_ram_auto.c b/src/mainboard/supermicro/h8qme_fam10/romstage.c
similarity index 100%
rename from src/mainboard/supermicro/h8qme_fam10/cache_as_ram_auto.c
rename to src/mainboard/supermicro/h8qme_fam10/romstage.c
diff --git a/src/mainboard/supermicro/h8qme_fam10/spd_addr.h b/src/mainboard/supermicro/h8qme_fam10/spd_addr.h
index b5994bf..5b32b4c 100644
--- a/src/mainboard/supermicro/h8qme_fam10/spd_addr.h
+++ b/src/mainboard/supermicro/h8qme_fam10/spd_addr.h
@@ -19,7 +19,7 @@
/**
* This file defines the SPD addresses for the mainboard. Must be included in
- * cache_as_ram_auto.c
+ * romstage.c
*/
#define RC00 0
diff --git a/src/mainboard/supermicro/x6dai_g/auto.c b/src/mainboard/supermicro/x6dai_g/romstage.c
similarity index 100%
rename from src/mainboard/supermicro/x6dai_g/auto.c
rename to src/mainboard/supermicro/x6dai_g/romstage.c
diff --git a/src/mainboard/supermicro/x6dhe_g/auto.c b/src/mainboard/supermicro/x6dhe_g/romstage.c
similarity index 100%
rename from src/mainboard/supermicro/x6dhe_g/auto.c
rename to src/mainboard/supermicro/x6dhe_g/romstage.c
diff --git a/src/mainboard/supermicro/x6dhe_g2/auto.c b/src/mainboard/supermicro/x6dhe_g2/romstage.c
similarity index 100%
rename from src/mainboard/supermicro/x6dhe_g2/auto.c
rename to src/mainboard/supermicro/x6dhe_g2/romstage.c
diff --git a/src/mainboard/supermicro/x6dhr_ig/auto.c b/src/mainboard/supermicro/x6dhr_ig/romstage.c
similarity index 100%
rename from src/mainboard/supermicro/x6dhr_ig/auto.c
rename to src/mainboard/supermicro/x6dhr_ig/romstage.c
diff --git a/src/mainboard/supermicro/x6dhr_ig2/auto.c b/src/mainboard/supermicro/x6dhr_ig2/romstage.c
similarity index 100%
rename from src/mainboard/supermicro/x6dhr_ig2/auto.c
rename to src/mainboard/supermicro/x6dhr_ig2/romstage.c
diff --git a/src/mainboard/technexion/tim5690/Makefile.inc b/src/mainboard/technexion/tim5690/Makefile.inc
index fc72512..25176c7 100644
--- a/src/mainboard/technexion/tim5690/Makefile.inc
+++ b/src/mainboard/technexion/tim5690/Makefile.inc
@@ -44,7 +44,7 @@
crt0s += $(src)/cpu/x86/16bit/reset16.inc
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -61,8 +61,8 @@
$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/technexion/tim5690/cache_as_ram_auto.c b/src/mainboard/technexion/tim5690/romstage.c
similarity index 100%
rename from src/mainboard/technexion/tim5690/cache_as_ram_auto.c
rename to src/mainboard/technexion/tim5690/romstage.c
diff --git a/src/mainboard/technexion/tim8690/Makefile.inc b/src/mainboard/technexion/tim8690/Makefile.inc
index dda9ecf..482dfff 100644
--- a/src/mainboard/technexion/tim8690/Makefile.inc
+++ b/src/mainboard/technexion/tim8690/Makefile.inc
@@ -38,7 +38,7 @@
crt0s += $(src)/cpu/x86/16bit/reset16.inc
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -55,8 +55,8 @@
$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/technexion/tim8690/cache_as_ram_auto.c b/src/mainboard/technexion/tim8690/romstage.c
similarity index 100%
rename from src/mainboard/technexion/tim8690/cache_as_ram_auto.c
rename to src/mainboard/technexion/tim8690/romstage.c
diff --git a/src/mainboard/technologic/ts5300/auto.c b/src/mainboard/technologic/ts5300/romstage.c
similarity index 100%
rename from src/mainboard/technologic/ts5300/auto.c
rename to src/mainboard/technologic/ts5300/romstage.c
diff --git a/src/mainboard/televideo/tc7020/auto.c b/src/mainboard/televideo/tc7020/romstage.c
similarity index 100%
rename from src/mainboard/televideo/tc7020/auto.c
rename to src/mainboard/televideo/tc7020/romstage.c
diff --git a/src/mainboard/thomson/ip1000/auto.c b/src/mainboard/thomson/ip1000/romstage.c
similarity index 100%
rename from src/mainboard/thomson/ip1000/auto.c
rename to src/mainboard/thomson/ip1000/romstage.c
diff --git a/src/mainboard/tyan/s1846/auto.c b/src/mainboard/tyan/s1846/romstage.c
similarity index 100%
rename from src/mainboard/tyan/s1846/auto.c
rename to src/mainboard/tyan/s1846/romstage.c
diff --git a/src/mainboard/tyan/s2735/Makefile.inc b/src/mainboard/tyan/s2735/Makefile.inc
index 027dd1f..27b522a 100644
--- a/src/mainboard/tyan/s2735/Makefile.inc
+++ b/src/mainboard/tyan/s2735/Makefile.inc
@@ -40,7 +40,7 @@
crt0s += $(src)/cpu/x86/16bit/reset16.inc
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/cpu/x86/car/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -58,8 +58,8 @@
$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/tyan/s2735/reset.c b/src/mainboard/tyan/s2735/reset.c
index bffb038..371920d 100644
--- a/src/mainboard/tyan/s2735/reset.c
+++ b/src/mainboard/tyan/s2735/reset.c
@@ -1,6 +1,6 @@
void i82801er_hard_reset(void);
-/* FIXME: There's another hard_reset() in cache_as_ram_auto.c. Why? */
+/* FIXME: There's another hard_reset() in romstage.c. Why? */
void hard_reset(void)
{
i82801er_hard_reset();
diff --git a/src/mainboard/tyan/s2735/cache_as_ram_auto.c b/src/mainboard/tyan/s2735/romstage.c
similarity index 100%
rename from src/mainboard/tyan/s2735/cache_as_ram_auto.c
rename to src/mainboard/tyan/s2735/romstage.c
diff --git a/src/mainboard/tyan/s2850/cache_as_ram_auto.c b/src/mainboard/tyan/s2850/romstage.c
similarity index 100%
rename from src/mainboard/tyan/s2850/cache_as_ram_auto.c
rename to src/mainboard/tyan/s2850/romstage.c
diff --git a/src/mainboard/tyan/s2875/cache_as_ram_auto.c b/src/mainboard/tyan/s2875/romstage.c
similarity index 100%
rename from src/mainboard/tyan/s2875/cache_as_ram_auto.c
rename to src/mainboard/tyan/s2875/romstage.c
diff --git a/src/mainboard/tyan/s2880/cache_as_ram_auto.c b/src/mainboard/tyan/s2880/romstage.c
similarity index 100%
rename from src/mainboard/tyan/s2880/cache_as_ram_auto.c
rename to src/mainboard/tyan/s2880/romstage.c
diff --git a/src/mainboard/tyan/s2881/cache_as_ram_auto.c b/src/mainboard/tyan/s2881/romstage.c
similarity index 100%
rename from src/mainboard/tyan/s2881/cache_as_ram_auto.c
rename to src/mainboard/tyan/s2881/romstage.c
diff --git a/src/mainboard/tyan/s2882/cache_as_ram_auto.c b/src/mainboard/tyan/s2882/romstage.c
similarity index 100%
rename from src/mainboard/tyan/s2882/cache_as_ram_auto.c
rename to src/mainboard/tyan/s2882/romstage.c
diff --git a/src/mainboard/tyan/s2885/cache_as_ram_auto.c b/src/mainboard/tyan/s2885/romstage.c
similarity index 100%
rename from src/mainboard/tyan/s2885/cache_as_ram_auto.c
rename to src/mainboard/tyan/s2885/romstage.c
diff --git a/src/mainboard/tyan/s2891/cache_as_ram_auto.c b/src/mainboard/tyan/s2891/romstage.c
similarity index 100%
rename from src/mainboard/tyan/s2891/cache_as_ram_auto.c
rename to src/mainboard/tyan/s2891/romstage.c
diff --git a/src/mainboard/tyan/s2892/cache_as_ram_auto.c b/src/mainboard/tyan/s2892/romstage.c
similarity index 100%
rename from src/mainboard/tyan/s2892/cache_as_ram_auto.c
rename to src/mainboard/tyan/s2892/romstage.c
diff --git a/src/mainboard/tyan/s2895/cache_as_ram_auto.c b/src/mainboard/tyan/s2895/romstage.c
similarity index 100%
rename from src/mainboard/tyan/s2895/cache_as_ram_auto.c
rename to src/mainboard/tyan/s2895/romstage.c
diff --git a/src/mainboard/tyan/s2912/Makefile.inc b/src/mainboard/tyan/s2912/Makefile.inc
index 7ca52cc..4da637b 100644
--- a/src/mainboard/tyan/s2912/Makefile.inc
+++ b/src/mainboard/tyan/s2912/Makefile.inc
@@ -25,7 +25,7 @@
obj-y += get_bus_conf.o
obj-$(CONFIG_GENERATE_MP_TABLE) += mptable.o
obj-$(CONFIG_GENERATE_PIRQ_TABLE) += irq_tables.o
-obj-$(CONFIG_USE_INIT) += cache_as_ram_auto.o
+obj-$(CONFIG_USE_INIT) += romstage.o
obj-$(CONFIG_AP_CODE_IN_CAR) += apc_auto.o
# This is part of the conversion to init-obj and away from included code.
@@ -36,7 +36,7 @@
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/southbridge/nvidia/mcp55/romstrap.inc
crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -57,11 +57,11 @@
$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
-$(obj)/mainboard/$(MAINBOARDDIR)/apc_auto.o: $(src)/mainboard/$(MAINBOARDDIR)/apc_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/apc_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/apc_auto.o: $(src)/mainboard/$(MAINBOARDDIR)/apc_romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/apc_romstage.c -o $@
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/tyan/s2912/cache_as_ram_auto.c b/src/mainboard/tyan/s2912/romstage.c
similarity index 100%
rename from src/mainboard/tyan/s2912/cache_as_ram_auto.c
rename to src/mainboard/tyan/s2912/romstage.c
diff --git a/src/mainboard/tyan/s2912_fam10/Makefile.inc b/src/mainboard/tyan/s2912_fam10/Makefile.inc
index 9e6bad7..8d0dfbe 100644
--- a/src/mainboard/tyan/s2912_fam10/Makefile.inc
+++ b/src/mainboard/tyan/s2912_fam10/Makefile.inc
@@ -25,14 +25,14 @@
obj-y += get_bus_conf.o
obj-$(CONFIG_GENERATE_MP_TABLE) += mptable.o
obj-$(CONFIG_GENERATE_PIRQ_TABLE) += irq_tables.o
-obj-$(CONFIG_USE_INIT) += cache_as_ram_auto.o
+obj-$(CONFIG_USE_INIT) += romstage.o
obj-$(CONFIG_AP_CODE_IN_CAR) += apc_auto.o
# This is part of the conversion to init-obj and away from included code.
initobj-y += crt0.o
crt0s := $(src)/cpu/x86/32bit/entry32.inc
crt0s += $(src)/cpu/amd/car/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/32bit/entry32.lds
@@ -50,11 +50,11 @@
$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
-$(obj)/mainboard/$(MAINBOARDDIR)/apc_auto.o: $(src)/mainboard/$(MAINBOARDDIR)/apc_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/apc_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/apc_auto.o: $(src)/mainboard/$(MAINBOARDDIR)/apc_romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/apc_romstage.c -o $@
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/tyan/s2912_fam10/cache_as_ram_auto.c b/src/mainboard/tyan/s2912_fam10/romstage.c
similarity index 100%
rename from src/mainboard/tyan/s2912_fam10/cache_as_ram_auto.c
rename to src/mainboard/tyan/s2912_fam10/romstage.c
diff --git a/src/mainboard/tyan/s2912_fam10/spd_addr.h b/src/mainboard/tyan/s2912_fam10/spd_addr.h
index 915ee8b..a8abf33 100644
--- a/src/mainboard/tyan/s2912_fam10/spd_addr.h
+++ b/src/mainboard/tyan/s2912_fam10/spd_addr.h
@@ -19,7 +19,7 @@
/**
* This file defines the SPD addresses for the mainboard. Must be included in
- * cache_as_ram_auto.c
+ * romstage.c
*/
#define RC00 0
diff --git a/src/mainboard/tyan/s4880/cache_as_ram_auto.c b/src/mainboard/tyan/s4880/romstage.c
similarity index 100%
rename from src/mainboard/tyan/s4880/cache_as_ram_auto.c
rename to src/mainboard/tyan/s4880/romstage.c
diff --git a/src/mainboard/tyan/s4882/cache_as_ram_auto.c b/src/mainboard/tyan/s4882/romstage.c
similarity index 100%
rename from src/mainboard/tyan/s4882/cache_as_ram_auto.c
rename to src/mainboard/tyan/s4882/romstage.c
diff --git a/src/mainboard/via/epia-cn/auto.c b/src/mainboard/via/epia-cn/romstage.c
similarity index 96%
rename from src/mainboard/via/epia-cn/auto.c
rename to src/mainboard/via/epia-cn/romstage.c
index 4e60569..c03cb16 100644
--- a/src/mainboard/via/epia-cn/auto.c
+++ b/src/mainboard/via/epia-cn/romstage.c
@@ -101,7 +101,7 @@
uart_init();
console_init();
- print_spew("In auto.c:main()\r\n");
+ print_spew("In romstage.c:main()\r\n");
enable_smbus();
smbus_fixup(&ctrl);
@@ -121,5 +121,5 @@
/* ram_check(0, 640 * 1024); */
- print_spew("Leaving auto.c:main()\r\n");
+ print_spew("Leaving romstage.c:main()\r\n");
}
diff --git a/src/mainboard/via/epia-m/Makefile.inc b/src/mainboard/via/epia-m/Makefile.inc
index 95364b5..3c82c85 100644
--- a/src/mainboard/via/epia-m/Makefile.inc
+++ b/src/mainboard/via/epia-m/Makefile.inc
@@ -41,7 +41,7 @@
crt0s += $(src)/northbridge/via/vx800/romstrap.inc
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/cpu/x86/fpu_enable.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
crt0s += $(src)/cpu/x86/mmx_disable.inc
ifdef POST_EVALUATION
@@ -53,8 +53,8 @@
iasl -p dsdt -tc $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl
mv dsdt.hex $@
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/via/epia-m/auto.c b/src/mainboard/via/epia-m/romstage.c
similarity index 97%
rename from src/mainboard/via/epia-m/auto.c
rename to src/mainboard/via/epia-m/romstage.c
index 77cac78..8b8a96a 100644
--- a/src/mainboard/via/epia-m/auto.c
+++ b/src/mainboard/via/epia-m/romstage.c
@@ -105,7 +105,7 @@
enable_smbus();
- print_spew("In auto.c:main()\r\n");
+ print_spew("In romstage.c:main()\r\n");
/* Halt if there was a built in self test failure */
report_bist_failure(bist);
@@ -150,5 +150,5 @@
//dump_pci_devices();
- print_spew("Leaving auto.c:main()\r\n");
+ print_spew("Leaving romstage.c:main()\r\n");
}
diff --git a/src/mainboard/via/epia-m700/Makefile.inc b/src/mainboard/via/epia-m700/Makefile.inc
index 880c22e..5202e44 100644
--- a/src/mainboard/via/epia-m700/Makefile.inc
+++ b/src/mainboard/via/epia-m700/Makefile.inc
@@ -42,15 +42,15 @@
crt0s += $(src)/northbridge/via/vx800/romstrap.inc
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/cpu/via/car/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ifdef POST_EVALUATION
$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(src)/mainboard/$(MAINBOARDDIR)/dsdt.c
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
-$(obj)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/cache_as_ram_auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/via/epia-m700/cache_as_ram_auto.c b/src/mainboard/via/epia-m700/romstage.c
similarity index 99%
rename from src/mainboard/via/epia-m700/cache_as_ram_auto.c
rename to src/mainboard/via/epia-m700/romstage.c
index 45e8118..5da2dfe 100644
--- a/src/mainboard/via/epia-m700/cache_as_ram_auto.c
+++ b/src/mainboard/via/epia-m700/romstage.c
@@ -710,7 +710,7 @@
#endif
/*
- * The following code is copied from tyan\s2735\cache_as_ram_auto.c.
+ * The following code is copied from tyan\s2735\romstage.c.
* Only the code around CLEAR_FIRST_1M_RAM is changed. Removed all the code
* around CLEAR_FIRST_1M_RAM and #include "cpu/x86/car/cache_as_ram_post.c".
* The CLEAR_FIRST_1M_RAM seems to make cpu/x86/car/cache_as_ram_post.c stop
diff --git a/src/mainboard/via/epia-n/Makefile.inc b/src/mainboard/via/epia-n/Makefile.inc
index 8914faa..f8d0e6f 100644
--- a/src/mainboard/via/epia-n/Makefile.inc
+++ b/src/mainboard/via/epia-n/Makefile.inc
@@ -38,7 +38,7 @@
crt0s += $(src)/cpu/x86/16bit/reset16.inc
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/cpu/x86/fpu_enable.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
crt0s += $(src)/cpu/x86/mmx_disable.inc
ifdef POST_EVALUATION
@@ -50,8 +50,8 @@
iasl -p dsdt -tc $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl
mv dsdt.hex $@
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/via/epia-n/auto.c b/src/mainboard/via/epia-n/romstage.c
similarity index 97%
rename from src/mainboard/via/epia-n/auto.c
rename to src/mainboard/via/epia-n/romstage.c
index 8c87137..9f05325 100644
--- a/src/mainboard/via/epia-n/auto.c
+++ b/src/mainboard/via/epia-n/romstage.c
@@ -128,7 +128,7 @@
uart_init();
console_init();
- print_spew("In auto.c:main()\r\n");
+ print_spew("In romstage.c:main()\r\n");
enable_smbus();
smbus_fixup(&ctrl);
@@ -156,5 +156,5 @@
//ram_check(0, 640 * 1024);
- print_spew("Leaving auto.c:main()\r\n");
+ print_spew("Leaving romstage.c:main()\r\n");
}
diff --git a/src/mainboard/via/epia/Makefile.inc b/src/mainboard/via/epia/Makefile.inc
index 37e9ba6..4be5631 100644
--- a/src/mainboard/via/epia/Makefile.inc
+++ b/src/mainboard/via/epia/Makefile.inc
@@ -34,7 +34,7 @@
crt0s += $(src)/cpu/x86/16bit/reset16.inc
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/cpu/x86/fpu_enable.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
crt0s += $(src)/cpu/x86/mmx_disable.inc
ifdef POST_EVALUATION
@@ -46,8 +46,8 @@
iasl -p dsdt -tc $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl
mv dsdt.hex $@
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/via/epia/auto.c b/src/mainboard/via/epia/romstage.c
similarity index 100%
rename from src/mainboard/via/epia/auto.c
rename to src/mainboard/via/epia/romstage.c
diff --git a/src/mainboard/via/pc2500e/auto.c b/src/mainboard/via/pc2500e/romstage.c
similarity index 100%
rename from src/mainboard/via/pc2500e/auto.c
rename to src/mainboard/via/pc2500e/romstage.c
diff --git a/src/mainboard/via/vt8454c/Makefile.inc b/src/mainboard/via/vt8454c/Makefile.inc
index 09de4d1..8f321c2 100644
--- a/src/mainboard/via/vt8454c/Makefile.inc
+++ b/src/mainboard/via/vt8454c/Makefile.inc
@@ -32,7 +32,7 @@
crt0s += $(src)/cpu/x86/16bit/reset16.inc
crt0s += $(src)/arch/i386/lib/id.inc
crt0s += $(src)/cpu/via/car/cache_as_ram.inc
-crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/auto.inc
+crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc
ldscripts := $(src)/arch/i386/init/ldscript_fallback_cbfs.lb
ldscripts += $(src)/cpu/x86/16bit/entry16.lds
@@ -49,8 +49,8 @@
$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/mainboard/$(MAINBOARDDIR)/dsdt.c
$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@
-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/auto.c $(obj)/option_table.h
- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/auto.c -o $@
+$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(obj)/option_table.h
+ $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/romstage.c -o $@
perl -e 's/\.rodata/.rom.data/g' -pi $@
perl -e 's/\.text/.section .rom.text/g' -pi $@
diff --git a/src/mainboard/via/vt8454c/auto.c b/src/mainboard/via/vt8454c/romstage.c
similarity index 100%
rename from src/mainboard/via/vt8454c/auto.c
rename to src/mainboard/via/vt8454c/romstage.c
diff --git a/src/northbridge/amd/amdfam10/debug.c b/src/northbridge/amd/amdfam10/debug.c
index b0aee4b..bb0f865 100644
--- a/src/northbridge/amd/amdfam10/debug.c
+++ b/src/northbridge/amd/amdfam10/debug.c
@@ -18,7 +18,7 @@
*/
/*
- * Generic FAM10 debug code, used by mainboard specific car_auto.c
+ * Generic FAM10 debug code, used by mainboard specific romstage.c
*/
#include "amdfam10_pci.c"
diff --git a/src/northbridge/amd/amdk8/debug.c b/src/northbridge/amd/amdk8/debug.c
index 55e232f..f9e9671 100644
--- a/src/northbridge/amd/amdk8/debug.c
+++ b/src/northbridge/amd/amdk8/debug.c
@@ -1,5 +1,5 @@
/*
- * generic K8 debug code, used by mainboard specific auto.c
+ * generic K8 debug code, used by mainboard specific romstage.c
*
*/
diff --git a/src/northbridge/intel/e7501/debug.c b/src/northbridge/intel/e7501/debug.c
index e97930e..75ed33e 100644
--- a/src/northbridge/intel/e7501/debug.c
+++ b/src/northbridge/intel/e7501/debug.c
@@ -1,5 +1,5 @@
/*
- * generic debug code, used by mainboard specific auto.c
+ * generic debug code, used by mainboard specific romstage.c
*
*/
#if 1
diff --git a/src/northbridge/intel/i855gme/debug.c b/src/northbridge/intel/i855gme/debug.c
index 46d629b..4083add 100644
--- a/src/northbridge/intel/i855gme/debug.c
+++ b/src/northbridge/intel/i855gme/debug.c
@@ -19,7 +19,7 @@
*/
/*
- * generic K8 debug code, used by mainboard specific auto.c
+ * generic K8 debug code, used by mainboard specific romstage.c
*
*/
#if 1
diff --git a/src/northbridge/intel/i855pm/debug.c b/src/northbridge/intel/i855pm/debug.c
index 67670f9..7b85445 100644
--- a/src/northbridge/intel/i855pm/debug.c
+++ b/src/northbridge/intel/i855pm/debug.c
@@ -1,5 +1,5 @@
/*
- * generic K8 debug code, used by mainboard specific auto.c
+ * generic K8 debug code, used by mainboard specific romstage.c
*
*/
#if 1
diff --git a/src/northbridge/intel/i945/raminit.c b/src/northbridge/intel/i945/raminit.c
index 4083cef..124ef14 100644
--- a/src/northbridge/intel/i945/raminit.c
+++ b/src/northbridge/intel/i945/raminit.c
@@ -2796,7 +2796,7 @@
* signals to be disabled.
* If other similar mainboard occur, it would make sense to make
* this an entry in the sysinfo structure, and pre-initialize that
- * structure in the mainboard's auto.c main() function.
+ * structure in the mainboard's romstage.c main() function.
* For now an #ifdef will do.
*/
diff --git a/src/northbridge/via/cx700/cx700_early_smbus.c b/src/northbridge/via/cx700/cx700_early_smbus.c
index 218ae0a..ed79744 100644
--- a/src/northbridge/via/cx700/cx700_early_smbus.c
+++ b/src/northbridge/via/cx700/cx700_early_smbus.c
@@ -188,7 +188,7 @@
smbus_wait_until_ready();
/* Fetch the SMBus address of the SPD ROM from
- * the ctrl struct in auto.c in case they are at
+ * the ctrl struct in romstage.c in case they are at
* non-standard positions.
* SMBus Address shifted by 1
*/
diff --git a/src/northbridge/via/vx800/examples/cache_as_ram_auto.c b/src/northbridge/via/vx800/examples/romstage.c
similarity index 98%
rename from src/northbridge/via/vx800/examples/cache_as_ram_auto.c
rename to src/northbridge/via/vx800/examples/romstage.c
index fa8962b..c1de3f3 100644
--- a/src/northbridge/via/vx800/examples/cache_as_ram_auto.c
+++ b/src/northbridge/via/vx800/examples/romstage.c
@@ -559,13 +559,13 @@
}
#endif
/*
-the following code is copied from src\mainboard\tyan\s2735\cache_as_ram_auto.c
+the following code is copied from src/mainboard/tyan/s2735/romstage.c
Only the code around CLEAR_FIRST_1M_RAM is changed.
I remove all the code around CLEAR_FIRST_1M_RAM and #include "cpu/x86/car/cache_as_ram_post.c"
the CLEAR_FIRST_1M_RAM seems to make cpu/x86/car/cache_as_ram_post.c stop at somewhere,
and cpu/x86/car/cache_as_ram_post.c do not cache my $CONFIG_XIP_ROM_BASE+SIZE area.
-So,I use: #include "cpu/via/car/cache_as_ram_post.c". my via-version post.c have some diff withx86-version
+So, I use: #include "cpu/via/car/cache_as_ram_post.c". my via-version post.c have some diff with x86-version
*/
#if 1
{
diff --git a/src/southbridge/intel/i82801gx/i82801gx.h b/src/southbridge/intel/i82801gx/i82801gx.h
index 8f62c1b..3fc1fa6 100644
--- a/src/southbridge/intel/i82801gx/i82801gx.h
+++ b/src/southbridge/intel/i82801gx/i82801gx.h
@@ -40,7 +40,7 @@
#ifndef __ACPI__
#define DEBUG_PERIODIC_SMIS 0
-/* __ROMCC__ is set by auto.c to make sure
+/* __ROMCC__ is set by romstage.c to make sure
* none of the stage2 data structures are included.
*/
#if !defined( __ROMCC__ ) && !defined(__PRE_RAM__)
diff --git a/src/southbridge/intel/i82801gx/i82801gx_azalia.c b/src/southbridge/intel/i82801gx/i82801gx_azalia.c
index 21973ce..2b9b245 100644
--- a/src/southbridge/intel/i82801gx/i82801gx_azalia.c
+++ b/src/southbridge/intel/i82801gx/i82801gx_azalia.c
@@ -265,7 +265,7 @@
pci_write_config8(dev, 0x3c, 0x0a); // unused?
// TODO Actually check if we're AC97 or HDA instead of hardcoding this
- // here, in Config.lb and/or auto.c.
+ // here, in devicetree.cb and/or romstage.c.
reg8 = pci_read_config8(dev, 0x40);
reg8 |= (1 << 3); // Clear Clock Detect Bit
pci_write_config8(dev, 0x40, reg8);
@@ -279,7 +279,7 @@
//
reg8 = pci_read_config8(dev, 0x40); // Audio Control
- reg8 |= 1; // Select Azalia mode. This needs to be controlled via Config.lb
+ reg8 |= 1; // Select Azalia mode. This needs to be controlled via devicetree.cb
pci_write_config8(dev, 0x40, reg8);
reg8 = pci_read_config8(dev, 0x4d); // Docking Status
diff --git a/src/southbridge/via/vt8231/vt8231_ide.c b/src/southbridge/via/vt8231/vt8231_ide.c
index c17ab2e..a151ca0 100644
--- a/src/southbridge/via/vt8231/vt8231_ide.c
+++ b/src/southbridge/via/vt8231/vt8231_ide.c
@@ -13,7 +13,7 @@
if (!conf->enable_native_ide) {
// Run the IDE controller in 'compatiblity mode - i.e. don't use PCI
// interrupts. Using PCI ints confuses linux for some reason.
- /* Setting reg 0x42 here does not work. It is set in mainboard/auto.c
+ /* Setting reg 0x42 here does not work. It is set in mainboard/romstage.c
* It probably can only be changed while the IDE is disabled
* or it is possibly a timing issue. Ben Hewson 29 Apr 2007.
*/