nb/intel/pineview/raminit: Refactor timings selection
This does not use loops to compute timings but uses DIV_ROUND_UP.
Another thing affected by this patch are minimum timings. Presumably
those only need to be guarded against on DDR3. With this change
timings are set up like vendor (with tWTR below previous minimum)
TESTED on Intel D510MO
Change-Id: Ia374f26e5bbb8b90d90c24ae6c20412ba53bd7b6
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/19495
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
1 file changed