soc/intel/skylake: provide poweroff() implementation
Implement poweroff() by putting the chipset into ACPI S5 state.
BUG=chrome-os-partner:54977
Change-Id: I9288dcee13347a8aa3f822ca3d75148ba2792859
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/15688
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins)
diff --git a/src/soc/intel/skylake/pmutil.c b/src/soc/intel/skylake/pmutil.c
index 67ca9bd..0f74734 100644
--- a/src/soc/intel/skylake/pmutil.c
+++ b/src/soc/intel/skylake/pmutil.c
@@ -24,6 +24,7 @@
#include <device/pci.h>
#include <device/pci_def.h>
#include <console/console.h>
+#include <halt.h>
#include <stdlib.h>
#include <soc/gpio.h>
#include <soc/iomap.h>
@@ -430,3 +431,9 @@
return reg16;
}
+
+void poweroff(void)
+{
+ enable_pm1_control(SLP_EN | (SLP_TYP_S5 << SLP_TYP_SHIFT));
+ halt();
+}