mb/google/rex/var/rex0: Configure CNVi GPIO IO Standby State
This configures GPIO IO Standby State of GPP_F00 - GPP_F05 as masked
for CNVi.
Meteor Lake rex platform does not wake up from low power state by
bluetooth keyboard and mouse properly. It is identified that IO Standby
State needs to be configured as masked to function properly for CNVi.
BUG=None
TEST=Make rex platform suspend to s0ix state and press a key from
bluetooth keyboard. Check the platform wakes up properly from s0ix.
Change-Id: Ia98abde584699fa01acba47a9df4ef6332ac16fd
Signed-off-by: Jamie Ryu <jamie.m.ryu@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76338
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Sukumar Ghorai <sukumar.ghorai@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/mainboard/google/rex/variants/rex0/gpio.c b/src/mainboard/google/rex/variants/rex0/gpio.c
index b4ae756..f3c7324 100644
--- a/src/mainboard/google/rex/variants/rex0/gpio.c
+++ b/src/mainboard/google/rex/variants/rex0/gpio.c
@@ -236,17 +236,17 @@
PAD_CFG_GPO(GPP_E22, 1, DEEP),
/* GPP_F00 : [] ==> CNV_BRI_DT_R */
- PAD_CFG_NF(GPP_F00, NONE, DEEP, NF1),
+ PAD_CFG_NF_IOSTANDBY_IGNORE(GPP_F00, NONE, DEEP, NF1),
/* GPP_F01 : [] ==> CNV_BRI_RSP */
- PAD_CFG_NF(GPP_F01, UP_20K, DEEP, NF1),
+ PAD_CFG_NF_IOSTANDBY_IGNORE(GPP_F01, UP_20K, DEEP, NF1),
/* GPP_F02 : [] ==> CNV_RGI_DT_Rl */
- PAD_CFG_NF(GPP_F02, NONE, DEEP, NF1),
+ PAD_CFG_NF_IOSTANDBY_IGNORE(GPP_F02, NONE, DEEP, NF1),
/* GPP_F03 : [] ==> CNV_RGI_RSP */
- PAD_CFG_NF(GPP_F03, UP_20K, DEEP, NF1),
+ PAD_CFG_NF_IOSTANDBY_IGNORE(GPP_F03, UP_20K, DEEP, NF1),
/* GPP_F04 : [] ==> CNV_RF_RST_L */
- PAD_CFG_NF(GPP_F04, NONE, DEEP, NF1),
+ PAD_CFG_NF_IOSTANDBY_IGNORE(GPP_F04, NONE, DEEP, NF1),
/* GPP_F05 : [] ==> CNV_CLKREQ */
- PAD_CFG_NF(GPP_F05, NONE, DEEP, NF3),
+ PAD_CFG_NF_IOSTANDBY_IGNORE(GPP_F05, NONE, DEEP, NF3),
/* GPP_F06 : [] ==> WWAN_WLAN_COEX3 */
PAD_CFG_NF(GPP_F06, NONE, DEEP, NF1),
/* GPP_F07 : [] ==> UCAM_MCLK_R */