qemu-i440fx: Make it compile with CONFIG_DYNAMIC_CBMEM.

This commit was tested on qemu with and without CONFIG_DYNAMIC_CBMEM
  by running cmbmem -c once booted. The qemu command that was used was:
    qemu-system-i386 -bios ./build/coreboot.rom  -serial stdio -hda ../virt/parabola.img

Note that using CONFIG_RELOCATABLE_RAMSTAGE make it fails like that:
  Loading image.
  CBFS: Decompressing stage fallback/coreboot_ram @ 0x3ffbefc0 (184400 bytes)
  Loading module at 3ffbf000 with entry 3ffbf000. filesize: 0x18db8 memsize: 0x2c050
  Processing 1703 relocs with adjust value of 0x3ffbe000
  FATAL: Essential component is missing.
However without CONFIG_RELOCATABLE_RAMSTAGE set it boots fine.

Change-Id: I633a8c3832eee4e8bed244940fdc370b98dd26f0
Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@no-log.org>
Reviewed-on: http://review.coreboot.org/3504
Reviewed-by: Aaron Durbin <adurbin@google.com>
Tested-by: build bot (Jenkins)
diff --git a/src/mainboard/emulation/qemu-i440fx/memory.c b/src/mainboard/emulation/qemu-i440fx/memory.c
index 8245ca2..000a0f6 100644
--- a/src/mainboard/emulation/qemu-i440fx/memory.c
+++ b/src/mainboard/emulation/qemu-i440fx/memory.c
@@ -46,7 +46,15 @@
 	return qemu_get_memory_size() * 1024;
 }
 
+#if !CONFIG_DYNAMIC_CBMEM
 struct cbmem_entry *get_cbmem_toc(void)
 {
 	return (struct cbmem_entry *)(get_top_of_ram() - HIGH_MEMORY_SIZE);
 }
+#else
+void *cbmem_top(void)
+{
+	/* Top of cbmem is at lowest usable DRAM address below 4GiB. */
+	return (void *)get_top_of_ram();
+}
+#endif
diff --git a/src/mainboard/emulation/qemu-i440fx/northbridge.c b/src/mainboard/emulation/qemu-i440fx/northbridge.c
index 96d016b..3e45d9a 100644
--- a/src/mainboard/emulation/qemu-i440fx/northbridge.c
+++ b/src/mainboard/emulation/qemu-i440fx/northbridge.c
@@ -53,9 +53,11 @@
 	if (high)
 		ram_resource(dev, idx++, 4 * 1024 * 1024, high);
 
+#if !CONFIG_DYNAMIC_CBMEM
 	/* Leave some space for ACPI, PIRQ and MP tables */
 	high_tables_base = (tomk * 1024) - HIGH_MEMORY_SIZE;
 	high_tables_size = HIGH_MEMORY_SIZE;
+#endif
 
 	/* Reserve space for the IOAPIC.  This should be in the Southbridge,
 	 * but I couldn't tell which device to put it in. */