cyan/strago: Disable wwan
Disabling the wwan gpio line
since wwan is not used.
BRANCH=none
BUG=none
TEST=wwan should not connect to network on cyan/strago.
Change-Id: I9d2e5d5b185a4622218e894d3b092afe15e09289
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 9a20c602b3bb768baa38b17e21cb4e5b0d9249ef
Original-Change-Id: Ib8d5fd15a172ef898ce675a85c2ea3e5f5c79144
Original-Signed-off-by: Jagadish Krishnamoorthy <jagadish.krishnamoorthy@intel.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/285304
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/10992
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
diff --git a/src/mainboard/intel/strago/gpio.c b/src/mainboard/intel/strago/gpio.c
index 53d9039..3ca07e6 100755
--- a/src/mainboard/intel/strago/gpio.c
+++ b/src/mainboard/intel/strago/gpio.c
@@ -96,7 +96,7 @@
GPIO_NC, /* GPO FST_SPI_CS1_B */
Native_M1, /* 05 FST_SPI_D1 */
Native_M1, /* 06 FST_SPI_CS0_B */
- GPIO_OUT_HIGH, /* 07 FST_SPI_CS2_B */
+ GPIO_NC, /* 07 FST_SPI_CS2_B */
GPIO_NC, /* 15 UART1_RTS_B */
Native_M2, /* 16 UART1_RXD */
GPIO_NC, /* 17 UART2_RXD */
diff --git a/src/mainboard/intel/strago/gpio_bcrd2.c b/src/mainboard/intel/strago/gpio_bcrd2.c
index 3a4123d..b63db0b 100644
--- a/src/mainboard/intel/strago/gpio_bcrd2.c
+++ b/src/mainboard/intel/strago/gpio_bcrd2.c
@@ -96,7 +96,7 @@
GPIO_NC, /* GPO FST_SPI_CS1_B */
Native_M1, /* 05 FST_SPI_D1 */
Native_M1, /* 06 FST_SPI_CS0_B */
- GPIO_OUT_HIGH, /* 07 FST_SPI_CS2_B */
+ GPIO_NC, /* 07 FST_SPI_CS2_B */
GPIO_NC, /* 15 UART1_RTS_B */
Native_M2, /* 16 UART1_RXD */
GPIO_NC, /* 17 UART2_RXD */
diff --git a/src/mainboard/intel/strago/gpio_dvt.c b/src/mainboard/intel/strago/gpio_dvt.c
index 3c13f45..920c9d4 100755
--- a/src/mainboard/intel/strago/gpio_dvt.c
+++ b/src/mainboard/intel/strago/gpio_dvt.c
@@ -94,7 +94,7 @@
GPIO_NC, /* GPO FST_SPI_CS1_B */
Native_M1, /* 05 FST_SPI_D1 */
Native_M1, /* 06 FST_SPI_CS0_B */
- GPIO_OUT_HIGH, /* 07 FST_SPI_CS2_B */
+ GPIO_NC, /* 07 FST_SPI_CS2_B */
GPIO_NC, /* 15 UART1_RTS_B */
Native_M2, /* 16 UART1_RXD */
GPIO_NC, /* 17 UART2_RXD */