| commit | 361bb53aa2bb6314bf22690f5436af7c096d0e0a | [log] [tgz] |
|---|---|---|
| author | Felix Held <felix-coreboot@felixheld.de> | Tue Jun 15 20:57:04 2021 +0200 |
| committer | Felix Held <felix-coreboot@felixheld.de> | Thu Jun 17 14:21:58 2021 +0000 |
| tree | d0e4682ef6d9c644a4ab80de4a2ceb1eb3b7503c | |
| parent | ddbc771524a2a127dd51f711b6d88b13884c2164 [diff] [blame] |
soc/amd/picasso: introduce and use devicetree aliases for UART0-3 Since the default state of the MMIO UART devices in the chipset devicetree is off, the mainboard devicetree entries that disable MMIO UART devices are removed. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I913a587802020ce4e182b48632cdde1104c2a6e6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/55545 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb b/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb index f17eca7..0cf969c 100644 --- a/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb +++ b/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb
@@ -395,9 +395,6 @@ end end - device mmio 0xfedc9000 on end # console on UART0 - device mmio 0xfedca000 off end # UART1 - device mmio 0xfedce000 off end # UART2 - device mmio 0xfedcf000 off end # UART3 + device ref uart_0 on end # console end # chip soc/amd/picasso