soc/amd/picasso: introduce and use devicetree aliases for UART0-3
Since the default state of the MMIO UART devices in the chipset
devicetree is off, the mainboard devicetree entries that disable MMIO
UART devices are removed.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I913a587802020ce4e182b48632cdde1104c2a6e6
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55545
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/mainboard/amd/bilby/devicetree.cb b/src/mainboard/amd/bilby/devicetree.cb
index 932d280..862d20f 100644
--- a/src/mainboard/amd/bilby/devicetree.cb
+++ b/src/mainboard/amd/bilby/devicetree.cb
@@ -165,9 +165,7 @@
end
end # domain
- device mmio 0xfedc9000 on end # UART0
- device mmio 0xfedca000 on end # UART1
- device mmio 0xfedce000 off end # UART2
- device mmio 0xfedcf000 off end # UART3
+ device ref uart_0 on end # console
+ device ref uart_1 on end
end # chip soc/amd/picasso