commit 3600e960b603a610064c6024c275e149944df1ca
author Stefan Reinauer <reinauer@chromium.org> Tue Dec 11 12:49:32 2012 -0800
committer Stefan Reinauer <stefan.reinauer@coreboot.org> Wed Dec 12 00:27:10 2012 +0100
tree 831b1d8f9b34f0edf4dc79bcceaad6b10568b37f
parent de48f0fd4213f8d0e2c71cbd3929e629fd76eb96

Fix UART8250 console prototypes

and disable IO mapped UARTs on ARMV7 per default

Change-Id: I712c4677cbc8519323970556718f9bb6327d83c8
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/2021
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Tested-by: build bot (Jenkins)

src/include/uart8250.h

diff --git a/src/include/uart8250.h b/src/include/uart8250.h
index 8457530..b00ff48 100644
--- a/src/include/uart8250.h
+++ b/src/include/uart8250.h
@@ -115,6 +115,7 @@
 #define UART_LCS	CONFIG_TTYS0_LCS
 
 #ifndef __ROMCC__
+#if CONFIG_CONSOLE_SERIAL8250
 unsigned char uart8250_rx_byte(unsigned base_port);
 int uart8250_can_rx_byte(unsigned base_port);
 void uart8250_tx_byte(unsigned base_port, unsigned char data);
@@ -125,6 +126,8 @@
  */
 void uart8250_init(unsigned base_port, unsigned divisor);
 void uart_init(void);
+#endif
+#if CONFIG_CONSOLE_SERIAL8250MEM
 void uartmem_init(void);
 
 /* and the same for memory mapped uarts */
@@ -136,13 +139,13 @@
 u32 uart_mem_init(void);
 u32 uartmem_getbaseaddr(void);
 
-#if defined(__PRE_RAM__) && CONFIG_DRIVERS_OXFORD_OXPCIE && \
-	CONFIG_CONSOLE_SERIAL8250MEM
+#if defined(__PRE_RAM__) && CONFIG_DRIVERS_OXFORD_OXPCIE
 /* and special init for OXPCIe based cards */
 extern int oxford_oxpcie_present;
 
 void oxford_init(void);
 #endif
+#endif
 
 #endif /* __ROMCC__ */