tree 34e1e957cbc7bcccf35e3260b3f9793bf7e17400
parent 418d37e68956b13ea4e8abff8bf6ed30c0059bcd
author V Sowmya <v.sowmya@intel.com> 1624246183 +0530
committer Patrick Georgi <pgeorgi@google.com> 1625482051 +0000

mb/intel/adlrvp: Update the FIVR configurations

This patch sets the optimized FIVR configuration for adlrvp cutomized
based on the pnp measurements to achieve the better power savings in
sleep states.
* Enable the external V1p05, Vnn, VnnSx rails in S0i1, S0i2, S0i3, S3,
  S4, S5 states.
* Update the supported voltage states.
* Set the ICC max to 500mA for v1p05 and vnn.

Signed-off-by: V Sowmya <v.sowmya@intel.com>
Change-Id: I83e6910502d5cf9d4c26fa581272f59ac483ae19
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55703
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>