src/intel: Define HFSTS3 register
Changes:
1. Define HFSTS3 register across SoCs(apl/cnl/icl/tgl).
2. Define cse_is_hfs3_fw_sku_custom() which checks ME's Firmware SKU
is Custom or not.
TEST=Verified on hatch, soraka, bobba and iclrvp.
Change-Id: I4188e58a4a08d87be2d84674e00ed1407fb8bf82
Signed-off-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38798
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
diff --git a/src/soc/intel/common/block/cse/cse.c b/src/soc/intel/common/block/cse/cse.c
index c82f3bd..39c30e9 100644
--- a/src/soc/intel/common/block/cse/cse.c
+++ b/src/soc/intel/common/block/cse/cse.c
@@ -270,6 +270,13 @@
return cse_check_hfs1_com(ME_HFS1_COM_SOFT_TEMP_DISABLE);
}
+bool cse_is_hfs3_fw_sku_custom(void)
+{
+ union me_hfsts3 hfs3;
+ hfs3.data = me_read_config32(PCI_ME_HFSTS3);
+ return hfs3.fields.fw_sku == ME_HFS3_FW_SKU_CUSTOM;
+}
+
/* Makes the host ready to communicate with CSE */
void cse_set_host_ready(void)
{
diff --git a/src/soc/intel/common/block/include/intelblocks/cse.h b/src/soc/intel/common/block/include/intelblocks/cse.h
index 6f8f4ff..af8d852 100644
--- a/src/soc/intel/common/block/include/intelblocks/cse.h
+++ b/src/soc/intel/common/block/include/intelblocks/cse.h
@@ -186,4 +186,10 @@
*/
bool cse_is_hfs1_com_soft_temp_disable(void);
+/*
+ * Checks CSE's Firmware SKU is Custom or not.
+ * Returns true if CSE's Firmware SKU is Custom, otherwise false
+ */
+bool cse_is_hfs3_fw_sku_custom(void);
+
#endif // SOC_INTEL_COMMON_CSE_H