soc/intel/broadwell: Use common SMBus code
Change-Id: I74b21bfde4b76ccb0d432b00c25095f708b1d761
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50030
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/soc/intel/broadwell/include/soc/iomap.h b/src/soc/intel/broadwell/include/soc/iomap.h
index 241569e..7af6845 100644
--- a/src/soc/intel/broadwell/include/soc/iomap.h
+++ b/src/soc/intel/broadwell/include/soc/iomap.h
@@ -38,9 +38,6 @@
#define GPIO_BASE_ADDRESS 0x1400
#define GPIO_BASE_SIZE 0x400
-#define SMBUS_BASE_ADDRESS 0x0400
-#define SMBUS_BASE_SIZE 0x10
-
/* Temporary addresses used in romstage */
#define EARLY_GTT_BAR 0xe0000000
#define EARLY_XHCI_BAR 0xd7000000
diff --git a/src/soc/intel/broadwell/pch/smbus.c b/src/soc/intel/broadwell/pch/smbus.c
index 70655fc..bd57b0a 100644
--- a/src/soc/intel/broadwell/pch/smbus.c
+++ b/src/soc/intel/broadwell/pch/smbus.c
@@ -6,10 +6,9 @@
#include <device/pci.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
-#include <soc/iomap.h>
-#include <soc/ramstage.h>
-#include <soc/smbus.h>
#include <device/smbus_host.h>
+#include <southbridge/intel/common/smbus_ops.h>
+#include <soc/smbus.h>
static void pch_smbus_init(struct device *dev)
{
@@ -28,49 +27,6 @@
smbus_set_slave_addr(res->base, SMBUS_SLAVE_ADDR);
}
-static int lsmbus_read_byte(struct device *dev, u8 address)
-{
- u16 device;
- struct resource *res;
- struct bus *pbus;
-
- device = dev->path.i2c.device;
- pbus = get_pbus_smbus(dev);
- res = find_resource(pbus->dev, PCI_BASE_ADDRESS_4);
-
- return do_smbus_read_byte(res->base, device, address);
-}
-
-static int lsmbus_write_byte(struct device *dev, u8 address, u8 data)
-{
- u16 device;
- struct resource *res;
- struct bus *pbus;
-
- device = dev->path.i2c.device;
- pbus = get_pbus_smbus(dev);
- res = find_resource(pbus->dev, PCI_BASE_ADDRESS_4);
- return do_smbus_write_byte(res->base, device, address, data);
-}
-
-static struct smbus_bus_operations lops_smbus_bus = {
- .read_byte = lsmbus_read_byte,
- .write_byte = lsmbus_write_byte,
-};
-
-static void smbus_read_resources(struct device *dev)
-{
- struct resource *res = new_resource(dev, PCI_BASE_ADDRESS_4);
- res->base = SMBUS_BASE_ADDRESS;
- res->size = 32;
- res->limit = res->base + res->size - 1;
- res->flags = IORESOURCE_IO | IORESOURCE_FIXED | IORESOURCE_RESERVE |
- IORESOURCE_STORED | IORESOURCE_ASSIGNED;
-
- /* Also add MMIO resource */
- res = pci_get_resource(dev, PCI_BASE_ADDRESS_0);
-}
-
static struct device_operations smbus_ops = {
.read_resources = smbus_read_resources,
.set_resources = pci_dev_set_resources,
diff --git a/src/soc/intel/broadwell/pei_data.c b/src/soc/intel/broadwell/pei_data.c
index efc91fd..9d7a522 100644
--- a/src/soc/intel/broadwell/pei_data.c
+++ b/src/soc/intel/broadwell/pei_data.c
@@ -16,7 +16,7 @@
pei_data->board_type = BOARD_TYPE_ULT;
pei_data->usbdebug = CONFIG(USBDEBUG);
pei_data->pciexbar = MCFG_BASE_ADDRESS;
- pei_data->smbusbar = SMBUS_BASE_ADDRESS;
+ pei_data->smbusbar = CONFIG_FIXED_SMBUS_IO_BASE;
pei_data->ehcibar = EARLY_EHCI_BAR;
pei_data->xhcibar = EARLY_XHCI_BAR;
pei_data->gttbar = EARLY_GTT_BAR;