soc/intel/alderlake: Add support for I2C6 and I2C7
As per the EDS revision 1.3 add support for I2C6 and I2C7.
Signed-off-by: Varshit B Pandya <varshit.b.pandya@intel.com>
Change-Id: Id918d55e48b91993af9de8381995917aef55edc9
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55996
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h
index 24e8426..a4458ea 100644
--- a/src/include/device/pci_ids.h
+++ b/src/include/device/pci_ids.h
@@ -3526,6 +3526,8 @@
#define PCI_DEVICE_ID_INTEL_ADP_P_I2C3 0x51eb
#define PCI_DEVICE_ID_INTEL_ADP_P_I2C4 0x51c5
#define PCI_DEVICE_ID_INTEL_ADP_P_I2C5 0x51c6
+#define PCI_DEVICE_ID_INTEL_ADP_P_I2C6 0x51d8
+#define PCI_DEVICE_ID_INTEL_ADP_P_I2C7 0x51d9
#define PCI_DEVICE_ID_INTEL_ADP_S_I2C0 0x7acc
#define PCI_DEVICE_ID_INTEL_ADP_S_I2C1 0x7acd