tree a48952d88a85c011e4f401d4fd821c2e6d268a9e
parent 9190345bf071261a0764c9cfbe1472f974e2bd19
author CK Hu <ck.hu@mediatek.com> 1592279678 +0800
committer Hung-Te Lin <hungte@chromium.org> 1603425525 +0000

soc/mediatek/mt8192: Turn off L2C SRAM and reconfigure as L2 cache

Mediatek SoC uses part of the L2 cache as SRAM before DRAM is ready.
After DRAM is ready, we should invoke disable_l2c_sram to reconfigure
the L2C SRAM as L2 cache.

Signed-off-by: CK Hu <ck.hu@mediatek.com>
Change-Id: Icaf80bd9da3e082405ba66ef05dd5ea9185784a0
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46387
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>