commit 33769a5caadca0ff82267ab5021bc85315e1d7f5
author Vladimir Serbinenko <phcoder@gmail.com> Sat Aug 30 22:39:20 2014 +0200
committer Vladimir Serbinenko <phcoder@gmail.com> Wed Oct 15 10:54:27 2014 +0200
tree 5516792e4da43b83abbc327ce369be7ce9d01cd8
parent 8ffc085e1affaabbe3dca8ac6a89346b71dfc02e

gm45: Convert to per-device ACPI

Change-Id: Ib04b03b2dc2ad3bfa886b43df9dd6518bbb46e3f
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/6803
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>

src/northbridge/intel/gm45/Kconfig

diff --git a/src/northbridge/intel/gm45/Kconfig b/src/northbridge/intel/gm45/Kconfig
index b9244f9..fac7329 100644
--- a/src/northbridge/intel/gm45/Kconfig
+++ b/src/northbridge/intel/gm45/Kconfig
@@ -31,6 +31,7 @@
 	select IOMMU
 	select VGA
 	select INTEL_EDID
+	select PER_DEVICE_ACPI_TABLES
 
 config BOOTBLOCK_NORTHBRIDGE_INIT
 	string

src/northbridge/intel/gm45/acpi.c

diff --git a/src/northbridge/intel/gm45/acpi.c b/src/northbridge/intel/gm45/acpi.c
index da9bfa8..445995a 100644
--- a/src/northbridge/intel/gm45/acpi.c
+++ b/src/northbridge/intel/gm45/acpi.c
@@ -27,6 +27,9 @@
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
+#include <cbmem.h>
+#include <arch/acpigen.h>
+#include <cpu/cpu.h>
 #include "gm45.h"
 
 unsigned long acpi_fill_mcfg(unsigned long current)
@@ -105,3 +108,29 @@
 	/* TODO: reserve GTT for 0.2.0 and 0.2.1? */
 	return current;
 }
+
+#define ALIGN_CURRENT current = (ALIGN(current, 16))
+unsigned long northbridge_write_acpi_tables(unsigned long start, struct acpi_rsdp *rsdp)
+{
+	unsigned long current;
+#if CONFIG_IOMMU
+	acpi_dmar_t *dmar;
+#endif
+
+	current = start;
+
+#if CONFIG_IOMMU
+	printk(BIOS_DEBUG, "ACPI:     * DMAR\n");
+	dmar = (acpi_dmar_t *) current;
+	acpi_create_dmar(dmar);
+	current += dmar->header.length;
+	ALIGN_CURRENT;
+	acpi_add_table(rsdp, dmar);
+#endif
+
+	ALIGN_CURRENT;
+
+	printk(BIOS_DEBUG, "current = %lx\n", current);
+
+	return current;
+}

src/northbridge/intel/gm45/gm45.h

diff --git a/src/northbridge/intel/gm45/gm45.h b/src/northbridge/intel/gm45/gm45.h
index d93b6e4..673160b 100644
--- a/src/northbridge/intel/gm45/gm45.h
+++ b/src/northbridge/intel/gm45/gm45.h
@@ -429,6 +429,9 @@
 u32 decode_igd_gtt_size(u32 gsm);
 
 void init_iommu(void);
+
+struct acpi_rsdp;
+unsigned long northbridge_write_acpi_tables(unsigned long start, struct acpi_rsdp *rsdp);
 #endif
 
 #endif

src/northbridge/intel/gm45/northbridge.c

diff --git a/src/northbridge/intel/gm45/northbridge.c b/src/northbridge/intel/gm45/northbridge.c
index 7a4b038..e93d036 100644
--- a/src/northbridge/intel/gm45/northbridge.c
+++ b/src/northbridge/intel/gm45/northbridge.c
@@ -202,6 +202,8 @@
 	.init             = mch_domain_init,
 	.scan_bus         = pci_domain_scan_bus,
 	.ops_pci_bus	  = pci_bus_default_ops,
+	.write_acpi_tables = northbridge_write_acpi_tables,
+	.acpi_fill_ssdt_generator = generate_cpu_entries,
 };