diff --git a/src/drivers/intel/fsp1_1/cache_as_ram.S b/src/drivers/intel/fsp1_1/cache_as_ram.S
index 3be9eb9..b5b47ce 100644
--- a/src/drivers/intel/fsp1_1/cache_as_ram.S
+++ b/src/drivers/intel/fsp1_1/cache_as_ram.S
@@ -145,14 +145,13 @@
 	 * mm1:  high 32-bits of TSC value
 	 */
 
-	/* coreboot assumes stack/heap region will be zero */
+	/* clear .bss section */
 	cld
-	movl	%ecx, %edi
-	neg	%ecx
-	/* Clear up to Temp Ram top. */
-	add	%edx, %ecx
+	xor	%eax, %eax
+	movl	$(_ebss), %ecx
+	movl	$(_bss), %edi
+	sub	%edi, %ecx
 	shrl	$2, %ecx
-	xorl	%eax, %eax
 	rep	stosl
 
 	/* Need to align stack to 16 bytes at call instruction. Account for