Gitiles
Code Review Sign In
review.coreboot.org / coreboot / 3332f33009c41f36b6db9d691eb3ea506ea2e4e4 / . / src / soc / nvidia / tegra210
tree: ca2cb37b1a452ebf2f991f159117718748b0ed9f [path history] [tgz]
  1. include/
  2. jdi_25x18_display/
  3. lp0/
  4. addressmap.c
  5. ape.c
  6. bootblock.c
  7. bootblock_asm.S
  8. cbmem.c
  9. ccplex.c
  10. chip.h
  11. clock.c
  12. cpu.c
  13. cpu_lib.S
  14. dc.c
  15. dma.c
  16. dp.c
  17. dsi.c
  18. flow_ctrl.c
  19. funitcfg.c
  20. gic.c
  21. i2c.c
  22. i2c6.c
  23. Kconfig
  24. maincpu.S
  25. Makefile.inc
  26. mipi-phy.c
  27. mipi.c
  28. mipi_dsi.c
  29. mmu_operations.c
  30. monotonic_timer.c
  31. mtc.c
  32. padconfig.c
  33. power.c
  34. psci.c
  35. ram_code.c
  36. ramstage.c
  37. reset.c
  38. romstage.c
  39. romstage_asm.S
  40. sdram.c
  41. sdram_lp0.c
  42. secmon.c
  43. soc.c
  44. sor.c
  45. spi.c
  46. stack.S
  47. stage_entry.S
  48. uart.c
  49. verstage.c
Powered by Gitilestxt json