soc/amd/stoneyridge: Support ACPI USB code generation
To support generating USB devices in ACPI the platform needs to
know how to determine a device name for each USB port, and for any
root hubs that may be present.
The AMD Stoney Ridge platform has separate controllers for USB 2.0
and USB 3.0. The USB 2.0 ports are connected through a hub to an
EHCI controller while the USB 3.0 ports are directly connected to
the xHCI controller.
This topology is described in ACPI and the port names are exposed
by the soc_acpi_name() function.
The USB controllers are configured to scan for static USB devices
in the devicetree and use the soc_acpi_name() function to identify
them.
Change-Id: I2bb677f84a49d2531929985dba319455b88e1686
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Reviewed-on: https://review.coreboot.org/26175
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
diff --git a/src/soc/amd/stoneyridge/acpi/usb.asl b/src/soc/amd/stoneyridge/acpi/usb.asl
index 3fd76b2..6c6ff9c 100644
--- a/src/soc/amd/stoneyridge/acpi/usb.asl
+++ b/src/soc/amd/stoneyridge/acpi/usb.asl
@@ -17,10 +17,24 @@
/* 0:12.0 - EHCI */
Device(EHC0) {
Name(_ADR, 0x00120000)
+ Device (RHUB) {
+ Name (_ADR, Zero)
+ Device (HS01) { Name (_ADR, 1) }
+ Device (HS02) { Name (_ADR, 2) }
+ Device (HS03) { Name (_ADR, 3) }
+ Device (HS04) { Name (_ADR, 4) }
+ Device (HS05) { Name (_ADR, 5) }
+ Device (HS06) { Name (_ADR, 6) }
+ Device (HS07) { Name (_ADR, 7) }
+ Device (HS08) { Name (_ADR, 8) }
+ }
} /* end EHC0 */
/* 0:10.0 - XHCI 0*/
Device(XHC0) {
Name(_ADR, 0x00100000)
+ Device (SS01) { Name (_ADR, 1) }
+ Device (SS02) { Name (_ADR, 2) }
+ Device (SS03) { Name (_ADR, 3) }
} /* end XHC0 */
diff --git a/src/soc/amd/stoneyridge/chip.c b/src/soc/amd/stoneyridge/chip.c
index 08eecb9..46dcfa8 100644
--- a/src/soc/amd/stoneyridge/chip.c
+++ b/src/soc/amd/stoneyridge/chip.c
@@ -22,6 +22,7 @@
#include <device/pci.h>
#include <drivers/i2c/designware/dw_i2c.h>
#include <romstage_handoff.h>
+#include <soc/acpi.h>
#include <soc/cpu.h>
#include <soc/northbridge.h>
#include <soc/pci_devs.h>
@@ -42,10 +43,41 @@
.acpi_fill_ssdt_generator = generate_cpu_entries,
};
-static const char *soc_acpi_name(const struct device *dev)
+const char *soc_acpi_name(const struct device *dev)
{
if (dev->path.type == DEVICE_PATH_DOMAIN)
return "PCI0";
+
+ if (dev->path.type == DEVICE_PATH_USB) {
+ switch (dev->path.usb.port_type) {
+ case 0:
+ /* Root Hub */
+ return "RHUB";
+ case 2:
+ /* USB2 ports */
+ switch (dev->path.usb.port_id) {
+ case 0: return "HS01";
+ case 1: return "HS02";
+ case 2: return "HS03";
+ case 3: return "HS04";
+ case 4: return "HS05";
+ case 5: return "HS06";
+ case 6: return "HS07";
+ case 7: return "HS08";
+ }
+ break;
+ case 3:
+ /* USB3 ports */
+ switch (dev->path.usb.port_id) {
+ case 0: return "SS01";
+ case 1: return "SS02";
+ case 2: return "SS03";
+ }
+ break;
+ }
+ return NULL;
+ }
+
if (dev->path.type != DEVICE_PATH_PCI)
return NULL;
diff --git a/src/soc/amd/stoneyridge/include/soc/acpi.h b/src/soc/amd/stoneyridge/include/soc/acpi.h
index 3e58d9a..69ab599 100644
--- a/src/soc/amd/stoneyridge/include/soc/acpi.h
+++ b/src/soc/amd/stoneyridge/include/soc/acpi.h
@@ -35,4 +35,6 @@
void southbridge_inject_dsdt(device_t device);
+const char *soc_acpi_name(const struct device *dev);
+
#endif /* __SOC_STONEYRIDGE_ACPI_H__ */
diff --git a/src/soc/amd/stoneyridge/usb.c b/src/soc/amd/stoneyridge/usb.c
index e6d608e..6007af1 100644
--- a/src/soc/amd/stoneyridge/usb.c
+++ b/src/soc/amd/stoneyridge/usb.c
@@ -21,6 +21,7 @@
#include <device/pci_ops.h>
#include <device/pci_ehci.h>
#include <arch/io.h>
+#include <soc/acpi.h>
#include <soc/pci_devs.h>
#include <soc/southbridge.h>
@@ -64,7 +65,8 @@
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
.init = set_usb_over_current,
- .scan_bus = NULL,
+ .scan_bus = scan_usb_bus,
+ .acpi_name = soc_acpi_name,
.ops_pci = &lops_pci,
};