soc/intel/baytrail/northcluster.c: Rename variable
Tested with BUILD_TIMELESS=1, Google Ninja does not change.
Change-Id: I7e74f342c0545f8d2a2128de4162581e5dc01e17
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43934
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
diff --git a/src/soc/intel/baytrail/northcluster.c b/src/soc/intel/baytrail/northcluster.c
index 3cf7717..f4a5c7d 100644
--- a/src/soc/intel/baytrail/northcluster.c
+++ b/src/soc/intel/baytrail/northcluster.c
@@ -64,7 +64,7 @@
static void nc_read_resources(struct device *dev)
{
unsigned long mmconf;
- unsigned long bmbound;
+ unsigned long bmbound_k;
unsigned long bmbound_hi;
unsigned long smmrrh;
unsigned long smmrrl;
@@ -98,8 +98,8 @@
reserved_ram_resource(dev, index++, smmrrl, smmrrh - smmrrl);
/* All address space between bmbound and smmrrh is unusable. */
- bmbound = RES_IN_KiB(nc_read_top_of_low_memory());
- mmio_resource(dev, index++, smmrrh, bmbound - smmrrh);
+ bmbound_k = RES_IN_KiB(nc_read_top_of_low_memory());
+ mmio_resource(dev, index++, smmrrh, bmbound_k - smmrrh);
/* The BMBOUND_HI register matches register bits of 31:24 with address
* bits of 35:28. Therefore, shift register to align properly. */