soc/intel/alderlake: Add GFx Device ID 0x46c3
This CL adds support for new ADL-M graphics Device ID 0x46c3.
TEST=boot to OS
Change-Id: Ib55fb501f96fe9bcc328202511bbfe84a3122285
Signed-off-by: Selma Bensaid <selma.bensaid@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57993
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h
index c36c1c6..be4ce76 100644
--- a/src/include/device/pci_ids.h
+++ b/src/include/device/pci_ids.h
@@ -3880,6 +3880,7 @@
#define PCI_DEVICE_ID_INTEL_ADL_S_GT1 0x4680
#define PCI_DEVICE_ID_INTEL_ADL_M_GT1 0x46c0
#define PCI_DEVICE_ID_INTEL_ADL_M_GT2 0x46aa
+#define PCI_DEVICE_ID_INTEL_ADL_M_GT3 0x46c3
/* Intel Northbridge Ids */
#define PCI_DEVICE_ID_INTEL_APL_NB 0x5af0
diff --git a/src/soc/intel/alderlake/bootblock/report_platform.c b/src/soc/intel/alderlake/bootblock/report_platform.c
index d4b3951..a053c70 100644
--- a/src/soc/intel/alderlake/bootblock/report_platform.c
+++ b/src/soc/intel/alderlake/bootblock/report_platform.c
@@ -109,6 +109,7 @@
{ PCI_DEVICE_ID_INTEL_ADL_P_GT2_6, "Alderlake P GT2" },
{ PCI_DEVICE_ID_INTEL_ADL_M_GT1, "Alderlake M GT1" },
{ PCI_DEVICE_ID_INTEL_ADL_M_GT2, "Alderlake M GT2" },
+ { PCI_DEVICE_ID_INTEL_ADL_M_GT3, "Alderlake M GT3" },
};
static inline uint8_t get_dev_revision(pci_devfn_t dev)
diff --git a/src/soc/intel/common/block/graphics/graphics.c b/src/soc/intel/common/block/graphics/graphics.c
index d9daaaf..8476b87 100644
--- a/src/soc/intel/common/block/graphics/graphics.c
+++ b/src/soc/intel/common/block/graphics/graphics.c
@@ -310,6 +310,7 @@
PCI_DEVICE_ID_INTEL_ADL_S_GT1,
PCI_DEVICE_ID_INTEL_ADL_M_GT1,
PCI_DEVICE_ID_INTEL_ADL_M_GT2,
+ PCI_DEVICE_ID_INTEL_ADL_M_GT3,
0,
};