soc/intel/alderlake: Add GFx Device ID 0x46aa
This CL adds support for new ADL-M graphics Device ID 0x46aa.
TEST=boot to OS
Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Change-Id: Ib24b494b0eedad447f3b2a3d1d80c9941680c25d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56775
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anil Kumar K <anil.kumar.k@intel.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h
index a4458ea..3757046 100644
--- a/src/include/device/pci_ids.h
+++ b/src/include/device/pci_ids.h
@@ -3824,6 +3824,7 @@
#define PCI_DEVICE_ID_INTEL_ADL_P_GT2_6 0x46a6
#define PCI_DEVICE_ID_INTEL_ADL_S_GT1 0x4680
#define PCI_DEVICE_ID_INTEL_ADL_M_GT1 0x46c0
+#define PCI_DEVICE_ID_INTEL_ADL_M_GT2 0x46aa
/* Intel Northbridge Ids */
#define PCI_DEVICE_ID_INTEL_APL_NB 0x5af0
diff --git a/src/soc/intel/alderlake/bootblock/report_platform.c b/src/soc/intel/alderlake/bootblock/report_platform.c
index a064714..4e071e7 100644
--- a/src/soc/intel/alderlake/bootblock/report_platform.c
+++ b/src/soc/intel/alderlake/bootblock/report_platform.c
@@ -107,6 +107,7 @@
{ PCI_DEVICE_ID_INTEL_ADL_P_GT2_5, "Alderlake P GT2" },
{ PCI_DEVICE_ID_INTEL_ADL_P_GT2_6, "Alderlake P GT2" },
{ PCI_DEVICE_ID_INTEL_ADL_M_GT1, "Alderlake M GT1" },
+ { PCI_DEVICE_ID_INTEL_ADL_M_GT2, "Alderlake M GT2" },
};
static inline uint8_t get_dev_revision(pci_devfn_t dev)
diff --git a/src/soc/intel/common/block/graphics/graphics.c b/src/soc/intel/common/block/graphics/graphics.c
index b99d2a8..753da6f 100644
--- a/src/soc/intel/common/block/graphics/graphics.c
+++ b/src/soc/intel/common/block/graphics/graphics.c
@@ -304,6 +304,7 @@
PCI_DEVICE_ID_INTEL_ADL_P_GT2_6,
PCI_DEVICE_ID_INTEL_ADL_S_GT1,
PCI_DEVICE_ID_INTEL_ADL_M_GT1,
+ PCI_DEVICE_ID_INTEL_ADL_M_GT2,
0,
};