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review.coreboot.org / coreboot / 314094fea6e91a99f1d971c406d871a8b925fbce
commit314094fea6e91a99f1d971c406d871a8b925fbce[log] [tgz]
authorDaniel Kurtz <djkurtz@chromium.org>Mon Jan 14 14:48:34 2019 -0700
committerMartin Roth <martinroth@google.com>Wed Jan 16 18:20:46 2019 +0000
treea9998476e243b1d28a6a252e4aa02d4a549f4381
parentb82afce18aff24b6e5e3b73a67a6533cc4865a26 [diff]
mainboard/google/kahlee: Also configure GPIO_9 in RAM stage

The general rule is to configure GPIOs used by coreboot in bootblock
(using the reset table), and GPIOs used by OS in RAM stage.

However, GPIO_9 will be used as both, and we need to reconfigure it to
properly set up debounce, however, it is no longer possible to change
bootblock, so we also configure it in RAM stage to make the new
debounce configuration take affect.

Signed-off-by: Daniel Kurtz <djkurtz@chromium.org>

BUG=b:113880780
BRANCH=none
TEST=Reboot stress test grunt (>100 times); no messages in dmesg like:
  tpm tpm0: Timeout waiting for TPM ready

Change-Id: I0f1bca176ed3f9cebf6b9e9e1008905e492a2f03
Reviewed-on: https://review.coreboot.org/c/30922
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
1 file changed
tree: a9998476e243b1d28a6a252e4aa02d4a549f4381
  1. 3rdparty/
  2. configs/
  3. Documentation/
  4. payloads/
  5. src/
  6. util/
  7. .checkpatch.conf
  8. .clang-format
  9. .gitignore
  10. .gitmodules
  11. .gitreview
  12. COPYING
  13. gnat.adc
  14. MAINTAINERS
  15. Makefile
  16. Makefile.inc
  17. README.md
  18. toolchain.inc
README.md

coreboot README

coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.

With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.

coreboot was formerly known as LinuxBIOS.

Payloads

After the basic initialization of the hardware has been performed, any desired "payload" can be started by coreboot.

See https://www.coreboot.org/Payloads for a list of supported payloads.

Supported Hardware

coreboot supports a wide range of chipsets, devices, and mainboards.

For details please consult:

Build Requirements

  • make
  • gcc / g++ Because Linux distribution compilers tend to use lots of patches. coreboot does lots of "unusual" things in its build system, some of which break due to those patches, sometimes by gcc aborting, sometimes - and that's worse - by generating broken object code. Two options: use our toolchain (eg. make crosstools-i386) or enable the ANY_TOOLCHAIN Kconfig option if you're feeling lucky (no support in this case).
  • iasl (for targets with ACPI support)
  • pkg-config
  • libssl-dev (openssl)

Optional:

  • doxygen (for generating/viewing documentation)
  • gdb (for better debugging facilities on some targets)
  • ncurses (for make menuconfig and make nconfig)
  • flex and bison (for regenerating parsers)

Building coreboot

Please consult https://www.coreboot.org/Build_HOWTO for details.

Testing coreboot Without Modifying Your Hardware

If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.

Please see https://www.coreboot.org/QEMU for details.

Website and Mailing List

Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:

https://www.coreboot.org

You can contact us directly on the coreboot mailing list:

https://www.coreboot.org/Mailinglist

Copyright and License

The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.

coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the "GPL (version 2, or any later version)", and some files are licensed under the "GPL, version 2". For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.

This makes the resulting coreboot images licensed under the GPL, version 2.