soc/intel/xeon_sp: Use ACPI common flags in SRAT generation

Move the definition of SRAT memory flags (SRAT_ACPI_MEMORY_ENABLED
and SRAT_ACPI_MEMORY_NONVOLATILE) from FSP header to ACPI common
codes.

TEST=intel/archercity CRB

Signed-off-by: Shuo Liu <shuo.liu@intel.com>
Change-Id: I6aa5c20c9556fd5d680406518d19a83801b0852c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80630
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com>
diff --git a/src/include/acpi/acpi.h b/src/include/acpi/acpi.h
index c39683e..d6c30c1 100644
--- a/src/include/acpi/acpi.h
+++ b/src/include/acpi/acpi.h
@@ -409,6 +409,10 @@
 	u32 clock_domain;		/* _CDM Clock Domain */
 } __packed acpi_srat_lapic_t;
 
+#define ACPI_SRAT_MEMORY_ENABLED	(1 << 0)
+#define ACPI_SRAT_MEMORY_HOT_PLUGGABLE	(1 << 1)
+#define ACPI_SRAT_MEMORY_NONVOLATILE	(1 << 2)
+
 /* SRAT: Memory Affinity Structure */
 typedef struct acpi_srat_mem {
 	u8 type;			/* Type (1) */
diff --git a/src/soc/intel/xeon_sp/uncore_acpi.c b/src/soc/intel/xeon_sp/uncore_acpi.c
index e3915b5..51c2e0e 100644
--- a/src/soc/intel/xeon_sp/uncore_acpi.c
+++ b/src/soc/intel/xeon_sp/uncore_acpi.c
@@ -132,9 +132,9 @@
 		srat_mem[mmap_index].length_low = (uint32_t)(size & 0xffffffff);
 		srat_mem[mmap_index].length_high = (uint32_t)(size >> 32);
 		srat_mem[mmap_index].proximity_domain = mem_element->SocketId;
-		srat_mem[mmap_index].flags = SRAT_ACPI_MEMORY_ENABLED;
+		srat_mem[mmap_index].flags = ACPI_SRAT_MEMORY_ENABLED;
 		if ((mem_element->Type & MEMTYPE_VOLATILE_MASK) == 0)
-			srat_mem[mmap_index].flags |= SRAT_ACPI_MEMORY_NONVOLATILE;
+			srat_mem[mmap_index].flags |= ACPI_SRAT_MEMORY_NONVOLATILE;
 		++mmap_index;
 	}
 
diff --git a/src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/hob_memmap.h b/src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/hob_memmap.h
index f7b5fb5..eef8cc6 100644
--- a/src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/hob_memmap.h
+++ b/src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/hob_memmap.h
@@ -60,11 +60,6 @@
 	MAX_SOCKET * MAX_IMC_PER_SOCKET * MAX_SRAT_MEM_ENTRIES_PER_IMC \
 	)
 
-/* ACPI SRAT Memory Flags */
-#define SRAT_ACPI_MEMORY_ENABLED               (1 << 0)
-#define SRAT_ACPI_MEMORY_HOT_REMOVE_SUPPORTED  (1 << 1)
-#define SRAT_ACPI_MEMORY_NONVOLATILE           (1 << 2)
-
 #define MEM_TYPE_RESERVED (1 << 8)
 #define MEM_ADDR_64MB_SHIFT_BITS 26
 
diff --git a/src/vendorcode/intel/fsp/fsp2_0/sapphirerapids_sp/defs_memmap.h b/src/vendorcode/intel/fsp/fsp2_0/sapphirerapids_sp/defs_memmap.h
index 9f04b93..89897bc 100644
--- a/src/vendorcode/intel/fsp/fsp2_0/sapphirerapids_sp/defs_memmap.h
+++ b/src/vendorcode/intel/fsp/fsp2_0/sapphirerapids_sp/defs_memmap.h
@@ -45,11 +45,6 @@
 #define MEMTYPE_2LM_MASK       (1 << 1)
 #define MEMTYPE_VOLATILE_MASK  (MEMTYPE_1LM_MASK | MEMTYPE_2LM_MASK)
 
-/* ACPI SRAT Memory Flags */
-#define SRAT_ACPI_MEMORY_ENABLED               (1 << 0)
-#define SRAT_ACPI_MEMORY_HOT_REMOVE_SUPPORTED  (1 << 1)
-#define SRAT_ACPI_MEMORY_NONVOLATILE           (1 << 2)
-
 #define MEM_TYPE_RESERVED (1 << 8)
 #define MEM_ADDR_64MB_SHIFT_BITS 26
 
@@ -68,4 +63,4 @@
 // #define MAX_SAD_RULES                     16
 // #define MAX_FPGA_REMOTE_SAD_RULES         2     // Maximum FPGA sockets exists on ICX platform
 
-#endif
\ No newline at end of file
+#endif
diff --git a/src/vendorcode/intel/fsp/fsp2_0/skylake_sp/hob_memmap.h b/src/vendorcode/intel/fsp/fsp2_0/skylake_sp/hob_memmap.h
index 954e43c..3440ab7 100644
--- a/src/vendorcode/intel/fsp/fsp2_0/skylake_sp/hob_memmap.h
+++ b/src/vendorcode/intel/fsp/fsp2_0/skylake_sp/hob_memmap.h
@@ -46,11 +46,6 @@
 	MAX_SOCKET * MAX_IMC_PER_SOCKET * MAX_SRAT_MEM_ENTRIES_PER_IMC \
 	)
 
-/* ACPI SRAT Memory Flags */
-#define SRAT_ACPI_MEMORY_ENABLED               (1 << 0)
-#define SRAT_ACPI_MEMORY_HOT_REMOVE_SUPPORTED  (1 << 1)
-#define SRAT_ACPI_MEMORY_NONVOLATILE           (1 << 2)
-
 #define MEM_TYPE_RESERVED (1 << 8)
 #define MEM_ADDR_64MB_SHIFT_BITS 26