MTRR: Mark all prefetchable resources as WRCOMB.
Change-Id: I2ecfd9733b65b6160bc2232d22db7b16692a847f
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/5149
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig
index 0a21fcc..8854e6b 100644
--- a/src/arch/x86/Kconfig
+++ b/src/arch/x86/Kconfig
@@ -7,14 +7,6 @@
select HAVE_ARCH_MEMCPY
select HAVE_ARCH_MEMMOVE
-config MARK_GRAPHICS_MEM_WRCOMB
- bool "Mark graphics memory as write-combining."
- default n
- help
- The graphics performance may increase if the graphics
- memory is set as write-combining cache type. This option
- enables marking the graphics memory as write-combining.
-
# This is an SMP option. It relates to starting up APs.
# It is usually set in mainboard/*/Kconfig.
# TODO: Improve description.
diff --git a/src/cpu/x86/mtrr/mtrr.c b/src/cpu/x86/mtrr/mtrr.c
index cdaa791..dfb9c94 100644
--- a/src/cpu/x86/mtrr/mtrr.c
+++ b/src/cpu/x86/mtrr/mtrr.c
@@ -178,9 +178,8 @@
MTRR_TYPE_UNCACHEABLE);
/* Handle any write combining resources. Only prefetchable
- * resources with the IORESOURCE_WRCOMB flag are appropriate
- * for this MTRR type. */
- match = IORESOURCE_PREFETCH | IORESOURCE_WRCOMB;
+ * resources are appropriate for this MTRR type. */
+ match = IORESOURCE_PREFETCH;
mask |= match;
memranges_add_resources(addr_space, mask, match,
MTRR_TYPE_WRCOMB);
diff --git a/src/include/device/resource.h b/src/include/device/resource.h
index 4bd9698..2d64c80 100644
--- a/src/include/device/resource.h
+++ b/src/include/device/resource.h
@@ -21,7 +21,6 @@
* to the bus below.
*/
#define IORESOURCE_BRIDGE 0x00080000 /* The IO resource has a bus below it. */
-#define IORESOURCE_WRCOMB 0x00100000 /* Write combining resource. */
#define IORESOURCE_RESERVE 0x10000000 /* The resource needs to be reserved in the coreboot table */
#define IORESOURCE_STORED 0x20000000 /* The IO resource assignment has been stored in the device */
#define IORESOURCE_ASSIGNED 0x40000000 /* An IO resource that has been assigned a value */
diff --git a/src/mainboard/google/bolt/Kconfig b/src/mainboard/google/bolt/Kconfig
index 1d2b259..5247070 100644
--- a/src/mainboard/google/bolt/Kconfig
+++ b/src/mainboard/google/bolt/Kconfig
@@ -19,7 +19,6 @@
select MAINBOARD_HAS_CHROMEOS
select EXTERNAL_MRC_BLOB
select CACHE_ROM
- select MARK_GRAPHICS_MEM_WRCOMB
select MONOTONIC_TIMER_MSR
config VBOOT_RAMSTAGE_INDEX
diff --git a/src/mainboard/google/falco/Kconfig b/src/mainboard/google/falco/Kconfig
index b372c47..d800206 100644
--- a/src/mainboard/google/falco/Kconfig
+++ b/src/mainboard/google/falco/Kconfig
@@ -19,7 +19,6 @@
select MAINBOARD_HAS_CHROMEOS
select EXTERNAL_MRC_BLOB
select CACHE_ROM
- select MARK_GRAPHICS_MEM_WRCOMB
select MONOTONIC_TIMER_MSR
select DRIVERS_I2C_RTD2132
diff --git a/src/mainboard/google/link/Kconfig b/src/mainboard/google/link/Kconfig
index d1e809e..efe9519 100644
--- a/src/mainboard/google/link/Kconfig
+++ b/src/mainboard/google/link/Kconfig
@@ -17,7 +17,6 @@
select SERIRQ_CONTINUOUS_MODE
select MAINBOARD_HAS_NATIVE_VGA_INIT
select EARLY_CBMEM_INIT
- select MARK_GRAPHICS_MEM_WRCOMB
config MAINBOARD_DIR
string
diff --git a/src/mainboard/google/peppy/Kconfig b/src/mainboard/google/peppy/Kconfig
index 7a406e1..6cac476 100644
--- a/src/mainboard/google/peppy/Kconfig
+++ b/src/mainboard/google/peppy/Kconfig
@@ -19,7 +19,6 @@
select MAINBOARD_HAS_CHROMEOS
select EXTERNAL_MRC_BLOB
select CACHE_ROM
- select MARK_GRAPHICS_MEM_WRCOMB
select MONOTONIC_TIMER_MSR
config VBOOT_RAMSTAGE_INDEX
diff --git a/src/mainboard/google/rambi/Kconfig b/src/mainboard/google/rambi/Kconfig
index 4d149c9..292d321 100644
--- a/src/mainboard/google/rambi/Kconfig
+++ b/src/mainboard/google/rambi/Kconfig
@@ -11,7 +11,6 @@
select HAVE_ACPI_RESUME
select MAINBOARD_HAS_CHROMEOS
select CHROMEOS
- select MARK_GRAPHICS_MEM_WRCOMB
config MAINBOARD_DIR
string
diff --git a/src/mainboard/google/slippy/Kconfig b/src/mainboard/google/slippy/Kconfig
index 065830a..6980234 100644
--- a/src/mainboard/google/slippy/Kconfig
+++ b/src/mainboard/google/slippy/Kconfig
@@ -19,7 +19,6 @@
select MAINBOARD_HAS_CHROMEOS
select EXTERNAL_MRC_BLOB
select CACHE_ROM
- select MARK_GRAPHICS_MEM_WRCOMB
select MONOTONIC_TIMER_MSR
select MAINBOARD_HAS_NATIVE_VGA_INIT
select MAINBOARD_DO_NATIVE_VGA_INIT
diff --git a/src/mainboard/intel/wtm2/Kconfig b/src/mainboard/intel/wtm2/Kconfig
index 99ed53c..8e13108 100644
--- a/src/mainboard/intel/wtm2/Kconfig
+++ b/src/mainboard/intel/wtm2/Kconfig
@@ -14,7 +14,6 @@
select HAVE_SMI_HANDLER
select MAINBOARD_HAS_CHROMEOS
select CACHE_ROM
- select MARK_GRAPHICS_MEM_WRCOMB
select MAINBOARD_HAS_NATIVE_VGA_INIT
select MONOTONIC_TIMER_MSR
diff --git a/src/northbridge/intel/haswell/gma.c b/src/northbridge/intel/haswell/gma.c
index 00d7583..2ceffe4 100644
--- a/src/northbridge/intel/haswell/gma.c
+++ b/src/northbridge/intel/haswell/gma.c
@@ -429,29 +429,12 @@
}
}
-static void gma_read_resources(struct device *dev)
-{
- pci_dev_read_resources(dev);
-
-#if CONFIG_MARK_GRAPHICS_MEM_WRCOMB
- struct resource *res;
-
- /* Set the graphics memory to write combining. */
- res = find_resource(dev, PCI_BASE_ADDRESS_2);
- if (res == NULL) {
- printk(BIOS_DEBUG, "gma: memory resource not found.\n");
- return;
- }
- res->flags |= IORESOURCE_WRCOMB;
-#endif
-}
-
static struct pci_operations gma_pci_ops = {
.set_subsystem = gma_set_subsystem,
};
static struct device_operations gma_func0_ops = {
- .read_resources = gma_read_resources,
+ .read_resources = pci_dev_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
.init = gma_func0_init,
diff --git a/src/northbridge/intel/nehalem/gma.c b/src/northbridge/intel/nehalem/gma.c
index c7a0e9b..2f13a6b 100644
--- a/src/northbridge/intel/nehalem/gma.c
+++ b/src/northbridge/intel/nehalem/gma.c
@@ -703,9 +703,6 @@
0xd0000001);
pci_write_config32(dev, PCI_BASE_ADDRESS_2 + 4,
0);
-#if CONFIG_MARK_GRAPHICS_MEM_WRCOMB
- res->flags |= IORESOURCE_WRCOMB;
-#endif
res->base = (resource_t) 0xd0000000;
res->size = (resource_t) 0x10000000;
}
diff --git a/src/northbridge/intel/sandybridge/gma.c b/src/northbridge/intel/sandybridge/gma.c
index 853139e..b9a07a2 100644
--- a/src/northbridge/intel/sandybridge/gma.c
+++ b/src/northbridge/intel/sandybridge/gma.c
@@ -664,29 +664,12 @@
}
}
-static void gma_read_resources(struct device *dev)
-{
- pci_dev_read_resources(dev);
-
-#if CONFIG_MARK_GRAPHICS_MEM_WRCOMB
- struct resource *res;
-
- /* Set the graphics memory to write combining. */
- res = find_resource(dev, PCI_BASE_ADDRESS_2);
- if (res == NULL) {
- printk(BIOS_DEBUG, "gma: memory resource not found.\n");
- return;
- }
- res->flags |= IORESOURCE_WRCOMB;
-#endif
-}
-
static struct pci_operations gma_pci_ops = {
.set_subsystem = gma_set_subsystem,
};
static struct device_operations gma_func0_ops = {
- .read_resources = gma_read_resources,
+ .read_resources = pci_dev_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = pci_dev_enable_resources,
.init = gma_func0_init,