tree 1f15bf10a6d6cb35dbfeedb545f2f43b329b4fe6
parent 9765394663f9d3b6e68b3f620dd1d429053d810c
author Karthikeyan Ramasubramanian <kramasub@google.com> 1601438786 -0600
committer Karthik Ramasubramanian <kramasub@google.com> 1602254644 +0000

mb/google/dedede: Override GPIO PM configuration

If Cr50 is running old firmware version and hence does not ensure long
interrupt pulses, override the GPIO PM configuration.

BUG=None
TEST=Build and boot waddledee to OS. Ensure that any chip override
happens before FSP silicon parameter initialization. Ensure that the
suspend/resume sequence works fine. Ensure that the reboot sequence
works fine for 50 iterations.

Change-Id: I455c51d4a63b1b5edadbf00c786ce61b0ba1ff00
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45857
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>