sb/intel/bd82x6x: Warn about slow PCIe downstream devices
Warn when a device took longer than usual to appear.
Use the PDS bit to detect if a root port has a downstream
device connected and warn if enumeration failed.
Test: On Lenovo X220 all PCIe device are visible, thus the
added code path is never taken.
Change-Id: I86b498b89d672b239d9951e116dc3680030666a6
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78229
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/southbridge/intel/bd82x6x/pcie.c b/src/southbridge/intel/bd82x6x/pcie.c
index 2658fd3..45ce5aa 100644
--- a/src/southbridge/intel/bd82x6x/pcie.c
+++ b/src/southbridge/intel/bd82x6x/pcie.c
@@ -243,12 +243,18 @@
static void pch_pciexp_scan_bridge(struct device *dev)
{
+ uint32_t cap = pci_find_capability(dev, PCI_CAP_ID_PCIE);
+
if (CONFIG(PCIEXP_HOTPLUG) && pci_is_hotplugable(dev)) {
pciexp_hotplug_scan_bridge(dev);
} else {
/* Normal PCIe Scan */
pciexp_scan_bridge(dev);
}
+ if ((pci_read_config16(dev, cap + PCI_EXP_SLTSTA) & PCI_EXP_SLTSTA_PDS) &&
+ !dev_is_active_bridge(dev))
+ printk(BIOS_WARNING, "%s: Has a slow downstream device. Enumeration failed.\n",
+ dev_path(dev));
/* Late Power Management init after bridge device enumeration */
pch_pcie_pm_late(dev);