AGESA hudson: Fix SPI writes
Only yangtze has longer FIFO in SPI controller. This was overlooked
in commit
9f0a2be AMD SPI: Optimise for longer writes
which broke SPI writes and caused CBFS errors with fam15tn.
Change-Id: I821e3f1fa186d2383b30eab9c5d52797c2ef22c5
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/6273
Tested-by: build bot (Jenkins)
Reviewed-by: Idwer Vollering <vidwer@gmail.com>
diff --git a/src/southbridge/amd/agesa/hudson/spi.c b/src/southbridge/amd/agesa/hudson/spi.c
index 2aeb2c0..bbf6dd3 100644
--- a/src/southbridge/amd/agesa/hudson/spi.c
+++ b/src/southbridge/amd/agesa/hudson/spi.c
@@ -43,7 +43,11 @@
#define SPI_REG_CNTRL11 0xd
#define CNTRL11_FIFOPTR_MASK 0x07
+#if IS_ENABLED(CONFIG_SOUTHBRIDGE_AMD_AGESA_YANGTZE)
#define AMD_SB_SPI_TX_LEN 64
+#else
+#define AMD_SB_SPI_TX_LEN 8
+#endif
static u32 spibar;