tree 8d0e418fe79e896a95370947fc0840baec9158d6
parent 437c2baac4f30e86c5fa7c6bf674eb269029456b
author Ronak Kanabar <ronak.kanabar@intel.com> 1613746338 +0530
committer Tim Wawrzynczak <twawrzynczak@chromium.org> 1614268236 +0000

vendorcode/intel/fsp: Add Alder Lake FSP headers for FSP v2037

The headers added are generated as per FSP v2037.
Previous FSP version was v2037.
Changes Include:
- add BootFrequency, RMTBIT, RmtPerTask, RMTLoopCount and
 MrcFastBoot UPDs in Fspm.h
- add EnableFastMsrHwpReq, VbtSize, CpuPcieComplianceTestMode,
 LidStatus and PcieComplianceTestMode UPDs in Fsps.h

BUG=b:178461282,b:180627057
BRANCH=None
TEST=Build and boot ADLRVP

Change-Id: I5496dfebc7b65a94abb31244ef2b400d89d6d444
Signed-off-by: Ronak Kanabar <ronak.kanabar@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50914
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>