| commit | 2f5cb2e3556db4b5fc7e372488e194646893e4fa | [log] [tgz] |
|---|---|---|
| author | Felix Held <felix-coreboot@felixheld.de> | Wed Nov 24 11:32:39 2021 +0100 |
| committer | Felix Held <felix-coreboot@felixheld.de> | Thu Nov 25 18:46:11 2021 +0000 |
| tree | 2e452d565f380bcad2e24d7f08fd2d41a45397e6 | |
| parent | f80f32b0e5b183f5ef269b94598dcef58a73a657 [diff] |
soc/amd/*/include/data_fabric: make MMIO_NP definition SoC-specific On Picasso the MMIO_NP bit in the D18F0_MMIO_CTRL0 data fabric register is bit 12, but that has changed to bit 16 in Cezanne. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I64c06b84e2c0737b259077e7932f418306638e19 Reviewed-on: https://review.coreboot.org/c/coreboot/+/59626 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
diff --git a/src/soc/amd/cezanne/include/soc/data_fabric.h b/src/soc/amd/cezanne/include/soc/data_fabric.h index 5dcbdd0..13a96e0 100644 --- a/src/soc/amd/cezanne/include/soc/data_fabric.h +++ b/src/soc/amd/cezanne/include/soc/data_fabric.h
@@ -5,6 +5,9 @@ #include <types.h> +/* SoC-specific bits in D18F0_MMIO_CTRL0 */ +#define MMIO_NP BIT(16) + #define IOMS0_FABRIC_ID 10 #define NUM_NB_MMIO_REGS 8
diff --git a/src/soc/amd/common/block/include/amdblocks/data_fabric.h b/src/soc/amd/common/block/include/amdblocks/data_fabric.h index 6df778d..ede5075 100644 --- a/src/soc/amd/common/block/include/amdblocks/data_fabric.h +++ b/src/soc/amd/common/block/include/amdblocks/data_fabric.h
@@ -15,7 +15,7 @@ #define D18F0_MMIO_LIMIT0 0x204 #define D18F0_MMIO_SHIFT 16 #define D18F0_MMIO_CTRL0 0x208 -#define MMIO_NP BIT(12) +/* The MMIO_NP bit is SoC-specific */ #define MMIO_DST_FABRIC_ID_SHIFT 4 #define MMIO_WE BIT(1) #define MMIO_RE BIT(0)
diff --git a/src/soc/amd/picasso/include/soc/data_fabric.h b/src/soc/amd/picasso/include/soc/data_fabric.h index 3a1f2c7..d652d19 100644 --- a/src/soc/amd/picasso/include/soc/data_fabric.h +++ b/src/soc/amd/picasso/include/soc/data_fabric.h
@@ -6,6 +6,10 @@ #include <types.h> /* D18F0 - Fabric Configuration registers */ + +/* SoC-specific bits in D18F0_MMIO_CTRL0 */ +#define MMIO_NP BIT(12) + #define IOMS0_FABRIC_ID 9 #define NUM_NB_MMIO_REGS 8