mb/qemu-riscv: update to match current qemu version
Boots again to payload not found on qemu.
Change-Id: Ie107eb882cbaac5a5a06c1ff990e7b9364377640
Signed-off-by: Philipp Hug <philipp@hug.cx>
Reviewed-on: https://review.coreboot.org/c/30554
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
diff --git a/src/mainboard/emulation/qemu-riscv/Kconfig b/src/mainboard/emulation/qemu-riscv/Kconfig
index 528b21e..ecaa764 100644
--- a/src/mainboard/emulation/qemu-riscv/Kconfig
+++ b/src/mainboard/emulation/qemu-riscv/Kconfig
@@ -13,7 +13,8 @@
## GNU General Public License for more details.
# To execute, do:
-# qemu-system-arm -M vexpress-a9 -m 1024M -nographic -kernel build/coreboot.rom
+# util/riscv/make-spike-elf.sh build/coreboot.rom build/coreboot.elf
+# qemu-system-riscv64 -M virt -m 1024M -nographic -kernel build/coreboot.elf
if BOARD_EMULATION_QEMU_RISCV
diff --git a/src/mainboard/emulation/qemu-riscv/Makefile.inc b/src/mainboard/emulation/qemu-riscv/Makefile.inc
index 1d882ac..eb99544 100644
--- a/src/mainboard/emulation/qemu-riscv/Makefile.inc
+++ b/src/mainboard/emulation/qemu-riscv/Makefile.inc
@@ -14,7 +14,7 @@
bootblock-y += uart.c
bootblock-y += rom_media.c
-bootblock-y += mtime.c
+bootblock-y += clint.c
romstage-y += romstage.c
romstage-y += uart.c
@@ -22,8 +22,10 @@
ramstage-y += uart.c
ramstage-y += rom_media.c
-ramstage-y += mtime.c
+ramstage-y += clint.c
bootblock-y += memlayout.ld
romstage-y += memlayout.ld
ramstage-y += memlayout.ld
+
+CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/include
diff --git a/src/mainboard/emulation/qemu-riscv/mtime.c b/src/mainboard/emulation/qemu-riscv/clint.c
similarity index 77%
rename from src/mainboard/emulation/qemu-riscv/mtime.c
rename to src/mainboard/emulation/qemu-riscv/clint.c
index f8c2717..367d48d 100644
--- a/src/mainboard/emulation/qemu-riscv/mtime.c
+++ b/src/mainboard/emulation/qemu-riscv/clint.c
@@ -14,9 +14,12 @@
*/
#include <mcall.h>
+#include <mainboard/addressmap.h>
-/* FIXME: This is an empty implementation, please improve */
/* This function is used to initialize HLS()->time/HLS()->timecmp */
void mtime_init(void)
{
+ long hart_id = read_csr(mhartid);
+ HLS()->time = (uint64_t *)(QEMU_VIRT_CLINT + 0xbff8);
+ HLS()->timecmp = (uint64_t *)(QEMU_VIRT_CLINT + 0x4000 + 8 * hart_id);
}
diff --git a/src/mainboard/emulation/qemu-riscv/mtime.c b/src/mainboard/emulation/qemu-riscv/include/mainboard/addressmap.h
similarity index 70%
copy from src/mainboard/emulation/qemu-riscv/mtime.c
copy to src/mainboard/emulation/qemu-riscv/include/mainboard/addressmap.h
index f8c2717..fd8c136 100644
--- a/src/mainboard/emulation/qemu-riscv/mtime.c
+++ b/src/mainboard/emulation/qemu-riscv/include/mainboard/addressmap.h
@@ -1,7 +1,7 @@
/*
* This file is part of the coreboot project.
*
- * Copyright (C) 2018 HardenedLinux
+ * Copyright (C) 2018 Philipp Hug
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -13,10 +13,8 @@
* GNU General Public License for more details.
*/
-#include <mcall.h>
-
-/* FIXME: This is an empty implementation, please improve */
-/* This function is used to initialize HLS()->time/HLS()->timecmp */
-void mtime_init(void)
-{
-}
+#define QEMU_VIRT_CLINT 0x02000000
+#define QEMU_VIRT_PLIC 0x0c000000
+#define QEMU_VIRT_UART0 0x10000000
+#define QEMU_VIRT_VIRTIO 0x10001000
+#define QEMU_VIRT_DRAM 0x80000000
diff --git a/src/mainboard/emulation/qemu-riscv/mainboard.c b/src/mainboard/emulation/qemu-riscv/mainboard.c
index 7061bcf..4b428aa 100644
--- a/src/mainboard/emulation/qemu-riscv/mainboard.c
+++ b/src/mainboard/emulation/qemu-riscv/mainboard.c
@@ -16,6 +16,7 @@
#include <console/console.h>
#include <device/device.h>
#include <cbmem.h>
+#include <symbols.h>
static void mainboard_enable(struct device *dev)
{
@@ -24,7 +25,7 @@
die("No dev0; die\n");
}
- ram_resource(dev, 0, 2048, 32768);
+ ram_resource(dev, 0, (uintptr_t)_dram / KiB, CONFIG_DRAM_SIZE_MB * KiB);
cbmem_recovery(0);
}
diff --git a/src/mainboard/emulation/qemu-riscv/memlayout.ld b/src/mainboard/emulation/qemu-riscv/memlayout.ld
index 615d1f2..032fbdd 100644
--- a/src/mainboard/emulation/qemu-riscv/memlayout.ld
+++ b/src/mainboard/emulation/qemu-riscv/memlayout.ld
@@ -14,15 +14,16 @@
*/
#include <memlayout.h>
-
#include <arch/header.ld>
+#define START 0x80000000
+
SECTIONS
{
- DRAM_START(0x0)
- BOOTBLOCK(0x0, 64K)
- ROMSTAGE(0x20000, 128K)
- STACK(0x40000, 0x3ff00)
- PRERAM_CBMEM_CONSOLE(0x80000, 8K)
- RAMSTAGE(0x100000, 16M)
+ DRAM_START(START)
+ BOOTBLOCK(START, 64K)
+ STACK(START + 4M, 4K)
+ ROMSTAGE(START + 4M + 64K, 128K)
+ PRERAM_CBMEM_CONSOLE(START + 4M + 192K, 8K)
+ RAMSTAGE(START + 4M + 200K, 16M)
}
diff --git a/src/mainboard/emulation/qemu-riscv/rom_media.c b/src/mainboard/emulation/qemu-riscv/rom_media.c
index c171307..bac1984 100644
--- a/src/mainboard/emulation/qemu-riscv/rom_media.c
+++ b/src/mainboard/emulation/qemu-riscv/rom_media.c
@@ -14,11 +14,12 @@
* GNU General Public License for more details.
*/
#include <boot_device.h>
+#include <symbols.h>
-/* This assumes that the CBFS resides at 0x0, which is true for the default
- * configuration. */
+/* This assumes that the CBFS resides at start of dram, which is true for the
+ * default configuration. */
static const struct mem_region_device boot_dev =
- MEM_REGION_DEV_RO_INIT(NULL, CONFIG_ROM_SIZE);
+ MEM_REGION_DEV_RO_INIT(_dram, CONFIG_ROM_SIZE);
const struct region_device *boot_device_ro(void)
{
diff --git a/src/mainboard/emulation/qemu-riscv/uart.c b/src/mainboard/emulation/qemu-riscv/uart.c
index 730ef3e..084362a 100644
--- a/src/mainboard/emulation/qemu-riscv/uart.c
+++ b/src/mainboard/emulation/qemu-riscv/uart.c
@@ -17,8 +17,9 @@
#include <console/uart.h>
#include <arch/io.h>
#include <boot/coreboot_tables.h>
+#include <mainboard/addressmap.h>
-static uint8_t *buf = (void *)0x3f8;
+static uint8_t *buf = (void *)QEMU_VIRT_UART0;
uintptr_t uart_platform_base(int idx)
{
return (uintptr_t) buf;
@@ -47,7 +48,7 @@
{
struct lb_serial serial;
serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED;
- serial.baseaddr = 0x3f8;
+ serial.baseaddr = QEMU_VIRT_UART0;
serial.baud = 115200;
serial.regwidth = 1;
lb_add_serial(&serial, data);